SOI Substrate Bulk Macro Defect Engineering
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Solution Overview
Problem
Semiconductor-on-insulator (SOI) substrates face issues with wafer distortion and overlay errors due to bulk micro defects, which can lead to defects and reduced performance in transistor devices.
Innovation Solution
A method of forming an SOI substrate with a handle substrate having a central region of high bulk macro defects surrounded by denuded regions, where the high concentration and size of these defects enhance structural integrity and reduce warpage, mitigating the formation of slip lines and overlay errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If bulk micro defects are present in the handle substrate, then the substrate can be manufactured with standard processes, but wafer distortion and overlay errors occur during subsequent processing
Solution Approach 1:
The patent converts the harmful effect of bulk micro defects into a beneficial one by intentionally introducing bulk macro defects that serve as stress compensation centers. These engineered defects counteract the stress-induced wafer distortion, thereby improving overlay precision while maintaining manufacturability through standard defect introduction processes.
Solution Approach 2:
The patent changes the physical parameters of defects in the handle substrate by introducing bulk macro defects with specific size ranges (0.1-10 micrometers) and controlled concentrations. This parameter change transforms the substrate's mechanical properties, reducing wafer distortion during high-temperature processing while preserving the ability to manufacture with standard processes.
2Stability of the object's composition
If the handle substrate is made with high structural integrity, then wafer distortion is reduced, but this requires complex defect engineering processes
Solution Approach 1:
The patent applies preliminary action by introducing bulk macro defects into the handle substrate before subsequent processing steps. This pre-engineering of the substrate structure ensures that stress compensation is already in place before wafer bonding and high-temperature processing, simplifying the overall process by eliminating the need for complex post-processing corrections.
Solution Approach 2:
The patent applies local quality by creating specific regions with bulk macro defects at controlled concentrations and sizes within the handle substrate. Rather than uniformly modifying the entire substrate, the defect engineering is applied locally to achieve stress compensation in critical areas while maintaining simplicity in the overall process flow.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach significantly reduces wafer distortion and overlay errors, enhancing the structural integrity and performance of the SOI substrate by introducing materials with greater stiffness and reducing the negative impact of bulk micro defects on the device layer.
Implementation Method 1
the high concentration and size of these defects enhance structural integrity and reduce warpage
Data Source
AI summary
The present disclosure, in some embodiments, relates to a method of forming a semiconductor structure. The method includes forming a plurality of bulk micro defects within a handle substrate. Sizes of the plurality of bulk micro defects are increased to form a plurality of bulk macro defects (BMDs) within the handle substrate. Some of the plurality of BMDs are removed from within a first denuded region and a second denuded region arranged along opposing surfaces of the handle substrate. An insulating layer is formed onto the handle substrate. A device layer comprising a semiconductor material is formed onto the insulating layer. The first denuded region and the second denuded region vertically surround a central region of the handle substrate that has a higher concentration of the plurality of BMDs than both the first denuded region and the second denuded region.