SOI Substrate Contact Fabrication via Single Mask Etching
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Solution Overview
Problem
The fabrication of integrated circuits using silicon-on-insulator (SOI) substrates faces challenges with static surface charge buildup due to the 'floating' nature of the substrate, which can disrupt device operation, and current manufacturing methods for grounding are complex and inefficient, requiring additional etching and deposition processes.
Innovation Solution
A method is developed to fabricate integrated circuits with reduced complexity by forming substrate contacts using a patterned mask to etch both device and substrate contact openings through an interlayer dielectric layer, allowing for simultaneous formation of device and substrate contacts with fewer etching masks and processes, thereby reducing manufacturing complexity and enhancing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If current manufacturing approaches are used to form substrate contacts, then static surface charges can be grounded, but the manufacturing process becomes complex with additional etching masks and processes
Solution Approach 1:
The patent combines the formation of device contact openings and substrate contact openings into a single etching process using one patterned mask. The mask includes both device contact patterns and substrate contact patterns, allowing simultaneous formation of both types of contacts through the interlayer dielectric layer, thereby eliminating the need for separate etching processes and masks while ensuring proper grounding to prevent static charge buildup.
2Reliability
If multiple etching masks are used for forming substrate contacts, then proper electrical pathways can be created, but manufacturing efficiency decreases
Solution Approach 1:
The patent performs preliminary action by forming both device contact patterns and substrate contact patterns in a single mask layer before the etching process. This preliminary patterning ensures that all necessary electrical pathways are pre-planned and will be created simultaneously in one etching step, eliminating the need for multiple sequential masking and etching operations, thus improving manufacturing efficiency while maintaining reliable electrical pathway formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the manufacturing process for forming substrate contacts in SOI substrates, reducing the risk of static charge buildup and improving the operational stability of integrated circuits while maintaining high performance.
Implementation Method 1
A patterned mask is used for etching through the ILD layer and forming a device contact opening that exposes the metal silicide region and a substrate contact opening that exposes the isolation structure
Implementation Method 2
A first conductive material is deposited overlying the ILD layer to fill the device contact opening and partially fill the substrate contact opening
Data Source
AI summary
Methods for fabricating integrated circuits are provided. In one example, a method includes depositing an ILD layer overlying a SOI substrate including a device structure and an isolation structure. The device structure is disposed on a semiconductor layer of the SOI substrate and includes a metal silicide region and the isolation structure extends through the semiconductor layer to a buried insulator layer of the SOI substrate. A patterned mask is used for etching through the ILD layer and forming a device contact opening that exposes the metal silicide region and a substrate contact opening that exposes the isolation structure. A device contact is formed in the device contact opening. The isolation structure and the buried insulator layer are etched through to extend the substrate contact opening to a support substrate of the SOI substrate. A substrate contact is formed in the substrate contact opening.