SOI Substrate with Dual Dielectric Layers for High-Frequency Signal Integrity
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Solution Overview
Problem
Current semiconductor-on-insulator (SOI) substrates face challenges in maintaining signal transmission quality at extremely high frequencies due to increased free charges, which affect the performance of radio frequency devices.
Innovation Solution
A semiconductor substrate is fabricated with a carrier substrate, a polycrystalline semiconductor layer, and a buried dielectric layer, where the polycrystalline semiconductor layer has a high resistivity and specific crystal plane characteristics, and a single crystalline semiconductor layer is formed on top, capturing free charges to improve signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional epitaxial silicon substrate is replaced with SOI substrate, then radio frequency device performance is improved, but free charges are generated at extremely high frequencies that affect signal transmission
Solution Approach 1:
The patent introduces an intermediate layer structure between the semiconductor layer and substrate, consisting of a first dielectric layer and a second dielectric layer with different dielectric constants. This intermediary structure modifies the electrical field distribution and reduces the generation and impact of free charges at extremely high frequencies, thereby maintaining signal transmission quality while preserving RF device performance.
Solution Approach 2:
The patent changes the dielectric parameters by using two different dielectric layers with distinct dielectric constants. The first dielectric layer has a lower dielectric constant while the second has a higher dielectric constant, creating a gradient structure that optimizes electrical field distribution and minimizes free charge effects at EHF frequencies.
2Speed
If operating frequency is increased to extremely high frequency for 5G communication, then communication capability is improved, but more free charges are generated to affect signal transmission
Solution Approach 1:
The dual dielectric layer structure acts as an intermediary that mediates between the high-frequency operating conditions and the semiconductor substrate. By strategically selecting dielectric constants for each layer, the structure suppresses free charge generation mechanisms that are exacerbated at extremely high frequencies, enabling stable 5G communication performance.
3Ease of manufacture
If a simple dielectric layer is used in SOI substrate, then manufacturing is simplified, but electronic performance at extremely high frequencies is insufficient
Solution Approach 1:
The patent employs a composite dielectric structure with two layers having different dielectric constants. This composite approach combines the advantages of both materials to achieve optimal electrical field management at extremely high frequencies, while the layered structure remains compatible with existing semiconductor manufacturing processes.
Solution Approach 2:
The patent applies different dielectric properties to different regions (layers) of the substrate structure. The first dielectric layer with lower dielectric constant addresses one aspect of field distribution, while the second layer with higher dielectric constant addresses another aspect, creating locally optimized conditions throughout the structure for EHF performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed substrate design enhances the electronic performance of radio frequency devices by effectively capturing free charges, thereby improving signal transmission at extremely high frequencies.
Implementation Method 1
A plasma treatment is performed on a surface of the carrier substrate
Implementation Method 2
A rapid thermal treatment is performed on the polycrystalline semiconductor layer
Data Source
AI summary
A method of fabricating a semiconductor substrate includes the following steps. A carrier substrate is provided, and a plasma treatment is performed on the surface of the carrier substrate. A polycrystalline semiconductor layer is formed on the surface of the carrier substrate. A rapid thermal treatment is then performed on the polycrystalline semiconductor layer. A buried dielectric layer is then formed on the polycrystalline semiconductor layer. Afterwards, a single crystalline semiconductor layer is formed on the buried dielectric layer.