SOI Carrier Substrate Oxygen Profile for Stable Resistivity

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Solution Overview

Problem

Silicon on Insulator (SOI) substrates face challenges in meeting the stringent requirements for logic and radio frequency applications, including excellent thickness uniformity, high crystalline quality, resistance to slip line defects, low inspection thresholds, and stable resistivity, which are compromised by high interstitial oxygen content, leading to resistivity instability and sensitivity to high temperature treatments.

Innovation Solution

A monocrystalline silicon support substrate with a surface region of low crystalline origin particles, an upper region of low interstitial oxygen content and high resistivity, and a lower region of high microdefect concentration, formed through specific heat treatment processes to ensure compatibility with thermal treatments and strict application specifications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a support substrate with high interstitial oxygen content is used to improve resistance to slip line defects, then mechanical robustness is improved, but inspectability deteriorates due to crystalline origin particles

Engineering Contradiction:
Improveresistance to slip line defectsVSAvoidinspectability
Core Design Contradiction:
StrengthVSDifficulty of detecting and measuring

Solution Approach 1:

The substrate is segmented into three distinct regions with different oxygen concentrations: a surface region (0-2μm) with low COP for inspectability, an intermediate region (2-20μm) with graded oxygen content, and a bulk region (>20μm) with high oxygen for mechanical strength. This segmentation allows each region to optimize its function independently.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the substrate are given different local qualities regarding oxygen content. The surface region has low interstitial oxygen to minimize COP and improve inspectability, while the bulk region maintains high interstitial oxygen for resistance to slip line defects. This local differentiation resolves the contradiction between inspectability and mechanical robustness.

Inventive Principle:
Principle #3Local quality

2Strength

If a support substrate with high interstitial oxygen content is used to improve resistance to slip line defects, then mechanical robustness is improved, but resistivity stability deteriorates

Engineering Contradiction:
Improveresistance to slip line defectsVSAvoidresistivity stability
Core Design Contradiction:
StrengthVSStability of the object's composition

Solution Approach 1:

The substrate is divided into regions with different oxygen contents, placing the low-oxygen intermediate region (2-20μm depth) directly beneath the device layer where resistivity stability is critical. This segmentation isolates the high-oxygen bulk region from the sensitive device area, preventing oxygen-related resistivity fluctuations while maintaining mechanical strength.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The intermediate region is specifically engineered with controlled oxygen content (5E17 to 1E18 atoms/cm³) to provide stable resistivity where needed, while the bulk region maintains high oxygen for mechanical strength. This local quality differentiation resolves the contradiction between mechanical robustness and resistivity stability.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If long-term high-temperature treatments are applied to improve thickness uniformity and crystalline quality, then useful layer quality is improved, but substrate defect formation increases

Engineering Contradiction:
Improvethickness uniformityVSAvoidsubstrate defects
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The substrate is pre-treated during manufacturing to create a low-defect intermediate region (2-20μm depth) with controlled oxygen content before the SOI structure is assembled. This preliminary action ensures the substrate is ready to withstand subsequent high-temperature treatments without generating excessive defects, allowing the useful layer to achieve excellent quality.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The intermediate region with graded oxygen content acts as a cushioning zone that absorbs and mitigates the propagation of defects from the bulk to the surface during high-temperature treatments. This beforehand cushioning protects the useful layer from defect generation while still allowing necessary thermal processing for quality improvement.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The substrate provides excellent inspectability, stable resistivity, and mechanical robustness, enabling the development of high-quality electronic components for low power and radio frequency logic applications with improved resistance to thermal treatments and defect sensitivity.

Implementation Method 1

a) providing an initial substrate made of monocrystalline silicon... b) applying a first heat treatment at a temperature of between 1150°C and 1250°C... to form the surface region and the upper region

Methodology Applied
Scientific EffectDissolution:

Implementation Method 2

applying a first heat treatment at a temperature of between 1150°C and 1250°C... to form the surface region and the upper region of the support substrate

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 3

c) applying a second heat treatment comprising a first annealing sequence at a temperature of between 600°C and 900°C, and a second annealing sequence at a temperature of between 950°C and 1100°C, to form the lower region

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentEP4176463B1Carrier substrate for soi structure and associated manufacturing method
Publication Date: 2024.06.12 SOITEC SA
  • EP4176463B1 patent drawingFigure 1~2
  • EP4176463B1 patent drawingFigure 3a~3c
  • EP4176463B1 patent drawingFigure 4(a)~6

AI summary

The invention relates to a carrier substrate (10) made of monocrystalline silicon and having a front face (10a) and a rear face (10b) and comprising: - a surface region (1) extending from the front face (10a) to a depth of between 800nm and 2 microns and having less than 10 crystal originated particles (COP) detected by a surface inspection based on dark field reflection microscopy, - an upper region (2) extending from the front face (10a) to a depth of between a few microns and 40 microns and having an interstitial oxygen content (Oi) less than or equal to 7.5E17 Oi/cm3 and a resistivity greater than 500 ohm.cm, and - a lower region (3) extending between the upper region (2) and the rear face (10b) and having a concentration of micro-defects (BMD) greater than or equal to 1E8/cm3. The invention also relates to a method for manufacturing such a carrier substrate (10).