SOI Substrate Segmentation for Logic and Memory Integration
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Solution Overview
Problem
Non-volatile memory devices are not conducive to Silicon on Insulator (SOI) substrates, limiting the integration of core logic devices that could benefit from the advantages of SOI substrates, such as reduced parasitic device capacitance.
Innovation Solution
A method of forming semiconductor devices on an SOI substrate by selectively removing the embedded insulator from the memory area, allowing for the formation of non-volatile memory cells alongside core logic devices, using a series of etching and insulation processes to create trenches and insulating layers that isolate both device types while enabling deeper source and drain regions for memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-volatile memory devices are formed on bulk silicon substrates, then deeper source and drain regions can be formed, but parasitic device capacitance increases and performance deteriorates
Solution Approach 1:
The substrate is segmented into two distinct areas: a first area with SOI structure for logic devices and a second area with bulk silicon structure for memory devices. This segmentation allows each device type to operate in its optimal substrate environment, with memory devices accessing deeper regions through the bulk silicon area while logic devices benefit from the reduced capacitance of the SOI structure in the first area.
Solution Approach 2:
Different substrate structures are provided in different locations: the first area has an SOI structure with insulating layer to reduce parasitic capacitance for logic devices, while the second area maintains bulk silicon structure to enable deep source and drain regions for memory devices. Each area has locally optimized properties suited to its device type.
2Reliability
If core logic devices are formed on SOI substrates, then parasitic device capacitance is reduced, but non-volatile memory devices cannot be formed due to substrate incompatibility
Solution Approach 1:
The substrate is divided into a first area for logic devices and a second area for memory devices, with each area having the appropriate substrate structure. This segmentation enables both device types to be integrated on the same substrate without compromising either device's performance requirements.
Solution Approach 2:
The substrate structure is locally optimized: the first area has SOI structure with insulating layer for logic devices, while the second area has bulk silicon structure for memory devices. This local differentiation allows versatile device integration while maintaining optimal performance characteristics for each device type.
3Ease of manufacture
If the same substrate structure is used for both logic and memory devices, then manufacturing is simplified, but each device type cannot achieve optimal performance
Solution Approach 1:
The substrate is segmented into regions with different structures, allowing each device type to achieve optimal performance in its designated area while using a unified substrate platform that can be processed through common fabrication steps.
Solution Approach 2:
Different substrate structures are provided locally for different device types, enabling each to achieve optimal performance characteristics while still using the same overall substrate and following similar manufacturing workflows.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the integration of non-volatile memory cells and core logic devices on the same SOI substrate, improving performance by allowing deeper source and drain regions for memory cells and shared polysilicon deposition processes for gates, effectively combining the benefits of both device types.
Implementation Method 1
An etch process is performed to remove the layer of silicon and the insulation layer from a second area of the substrate
Implementation Method 2
SOI substrates can be manufactured by SIMOX (separation by implantation of oxygen using an oxygen ion beam implantation
Data Source
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AI summary
A method of forming a semiconductor device starts with a substrate of silicon, a first insulation layer on the silicon, and a silicon layer on the first insulation layer. The silicon layer and the insulation layer are removed just from a second substrate area. A second insulation layer is formed over the silicon layer in the substrate first area and over the silicon in the second substrate area. A first plurality of trenches is formed in the first substrate area that each extends through all the layers and into the silicon. A second plurality of trenches is formed in the second substrate area that each extends through the second insulation layer and into the silicon. An insulation material is formed in the first and second trenches. Logic devices are formed in the first substrate area, and memory cells are formed in the second substrate area.