SOI Substrate Multi-Layer Trap Structure for RF Signal Integrity

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Solution Overview

Problem

Silicon-on-insulator (SOI) substrates face issues with parasitic capacitance and non-linear distortion of RF signals due to carrier accumulation at the interface between the handle silicon wafer and the insulative layer, leading to cross-talk and performance deterioration in RF applications.

Innovation Solution

A composite substrate with a multi-layered trap-rich structure is introduced, comprising polycrystalline silicon layers with crystal defects to trap carriers and a silicon oxide barrier layer to inhibit grain regrowth, resulting in a finer grain structure and increased trap density, which mitigates parasitic surface conduction and harmonic distortion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a handle silicon wafer with high resistivity is used to achieve device-to-device isolation and passive device Q-factors, then isolation performance is improved, but carrier accumulation occurs at the interface between the handle silicon wafer and the insulative layer, causing voltage interaction and performance deterioration

Engineering Contradiction:

Improvedevice-to-device isolationVSAvoidcarrier accumulation

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

A multi-layered trap-rich structure is introduced as an intermediary layer between the handle silicon wafer and the insulative layer. This structure includes a first doped polycrystalline silicon layer, a second doped polycrystalline silicon layer, and an intrinsic or lightly-doped polycrystalline silicon layer, which collectively serve as a mediator to manage carrier accumulation while preserving the isolation benefits of the high-resistivity handle wafer.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention employs a composite multi-layered structure combining different types of polycrystalline silicon layers (doped and intrinsic/lightly-doped) with varying properties. This composite approach creates a trap-rich environment that effectively captures carriers, preventing their accumulation at the critical interface while maintaining the overall isolation performance.

Inventive Principle:

Principle #40Composite materials

2Quantity of substance

If polycrystalline silicon layers are deposited to create trap-rich structure, then trap density increases and carrier accumulation is reduced, but grain regrowth occurs which may reduce trap density and effectiveness

Engineering Contradiction:

Improvetrap densityVSAvoidgrain structure stability

Core Design Contradiction:

Quantity of substanceVSStability of the object's composition

Solution Approach 1:

The doped polycrystalline silicon layers are deposited first to establish the trap-rich structure before the intrinsic or lightly-doped polycrystalline silicon layer is formed. This preliminary action ensures that the trap-rich layers are in place to capture carriers before subsequent processing steps may cause grain regrowth that would reduce trap density.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The multi-layered composite structure combines doped polycrystalline silicon layers (providing traps) with an intrinsic or lightly-doped polycrystalline silicon layer (providing structural stability). This composite design allows the trap-rich regions to maintain their effectiveness while the overall structure remains stable against unwanted grain regrowth.

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The multi-layered trap-rich structure effectively immobilizes surface conduction layers at RF frequencies, reducing harmonic distortion and improving signal integrity by increasing trap density and preventing grain regrowth, thus enhancing the performance of RF devices.

Implementation Method 1

A composite substrate with a multi-layered trap-rich structure is introduced, comprising polycrystalline silicon layers with crystal defects to trap carriers

Methodology Applied

Scientific EffectCarrier trapping: Absorption (physical)

Implementation Method 2

a silicon oxide barrier layer to inhibit grain regrowth

Methodology Applied

Scientific EffectPhysical barrier: Physical Containment

Data Source

PatentUS11164945B2SOI substrate, semiconductor device and method for manufacturing the same

Publication Date: 2021.11.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A silicon-on-insulator (SOI) substrate includes a semiconductor substrate and a multi-layered polycrystalline silicon structure. The multi-layered polycrystalline silicon structure is disposed over the semiconductor substrate. The multi-layered polycrystalline silicon structure includes a plurality of doped polycrystalline silicon layers stacked over one another, and an oxide layer between each adjacent pair of doped polycrystalline silicon layers. A number of the doped polycrystalline silicon layer is ranging from 2 to 6.