SOI Through-Hole Wiring Barrier for Etchant-Resistant Transistors

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Solution Overview

Problem

In semiconductor devices using silicon on insulator (SOI) substrates, parasitic capacitance between the support substrate and the semiconductor layer can lower high-frequency characteristics, and the removal of the support substrate during etching can cause failures due to etchant exposure through through-holes containing contact electrodes.

Innovation Solution

A semiconductor device design featuring a through-hole structure with a lower layer made of Ta, W, or their compounds acting as a barrier layer to prevent etchant entry, and a contact electrode with a bottom portion formed from similar materials to block etchant access to the transistor area, reducing the risk of device failure during support substrate removal.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the support substrate is removed by etching to reduce parasitic capacitance, then high-frequency characteristics are improved, but etchant may enter through the through-hole and cause device failure

Engineering Contradiction:
Improvehigh-frequency characteristicsVSAvoidetchant entry through through-hole
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A barrier layer made of Ta, W, or their compounds is introduced as an intermediary substance between the through-hole and the semiconductor layer. This barrier layer mediates by blocking the etchant from entering through the through-hole while allowing the support substrate removal process to proceed, thus resolving the contradiction between improving high-frequency characteristics and preventing etchant damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The barrier layer is formed in advance before the support substrate removal etching process. By preliminarily establishing this protective barrier, the patent prevents the harmful effect of etchant entry before it can occur, enabling safe removal of the support substrate to improve high-frequency characteristics.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If the contact electrode is exposed at the end surface during support substrate removal, then the structure is simple, but etchant can easily enter and cause failure

Engineering Contradiction:
Improvecontact electrode structureVSAvoidfailure occurrence
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The contact electrode structure is segmented into two functional parts: the main body (Al, Cu, or their alloys) that provides electrical connection, and the bottom portion (Ta, W, or their compounds) that provides etchant barrier function. This segmentation allows the structure to maintain simplicity while adding the necessary protective function to prevent etchant-induced failures.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The barrier layers effectively prevent etchant entry, reducing the occurrence of failures and maintaining high-frequency characteristics by minimizing parasitic capacitance and ensuring reliable etching processes.

Implementation Method 1

the lower layer of the first wiring functions as a barrier layer to stop further entry of the etchant. The bottom portion of the first contact electrode functions as a barrier layer, and thus stops entry of the etchant into an area where the transistor is disposed

Methodology Applied
Scientific EffectBarrier layer effect:

Data Source

PatentUS20240413083A1Semiconductor device
Publication Date: 2024.12.12 MURATA MFG CO LTD
  • US20240413083A1 patent drawing
  • US20240413083A1 patent drawing
  • US20240413083A1 patent drawing

AI summary

A first insulating layer containing a silicon oxide is disposed on a surface of an insulating member. A transistor is disposed over a part of an area of a first insulating layer. A second insulating layer covers the first insulating layer and the transistor. A first wiring is disposed on the second insulating layer. A through-hole extends through the second insulating layer and the first insulating layer from a lower surface of the first wiring to the insulating member. At least a part of an outer edge of the through-hole overlaps the first wiring in a plan view. The first wiring includes a lower layer that is in contact with the second insulating layer, and the lower layer is formed from Ta, W, a Ta compound, or a W compound.