SOI Transistor Dynamic Threshold Voltage Control
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Solution Overview
Problem
Existing silicon-on-insulator (SOI) technology faces challenges in achieving dynamic threshold voltage capability, which is essential for combating short-channel effects in semiconductor devices as devices shrink, and current methods with ultra-thin-body (UTB) and back-gate strategies result in fixed threshold voltages.
Innovation Solution
A semiconductor device and method incorporating a semiconductor substrate with an insulating layer, a first transistor, an outer well, and an inner well of opposite conductivity type, where the inner well's contact surrounds the gate structure, allowing for variable voltage application to alter the threshold voltage of the transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional FinFET process or UTB technology with back-gate strategy is used, then short-channel effects are reduced, but threshold voltage becomes fixed
Solution Approach 1:
The device is segmented into multiple independent threshold voltage control mechanisms: the back-gate voltage applied to the substrate and the inner well voltage applied to the isolated well region. Each segment can be controlled independently through separate voltage terminals, allowing dynamic adjustment of threshold voltage while maintaining short-channel effect suppression through the UTB structure.
Solution Approach 2:
The invention transforms the static threshold voltage characteristic of conventional UTB devices into a dynamic parameter by introducing variable voltage controls. The threshold voltage can be dynamically adjusted through back-gate biasing and inner well biasing, enabling the device to adapt its electrical characteristics based on operational requirements while preserving the short-channel effect mitigation benefits.
2Length of moving object
If devices continue to shrink to combat short-channel effects, then device scaling is achieved, but performance degradation occurs
Solution Approach 1:
The invention changes the electrical parameters (threshold voltage, carrier concentration) through variable biasing conditions rather than relying solely on physical dimension scaling. By adjusting back-gate and inner well voltages, the device can optimize its electrical characteristics to maintain performance at scaled dimensions, effectively decoupling performance from continuous size reduction.
Solution Approach 2:
The invention introduces an additional control dimension through the inner well structure embedded within the UTB. This creates a three-dimensional voltage control architecture where back-gate voltage and inner well voltage independently influence channel characteristics, providing enhanced control over device performance without further reducing the already minimized body thickness.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables dynamic adjustment of threshold voltage, improving performance by reducing short-channel effects and enhancing multi-threshold voltage capability in semiconductor devices.
Implementation Method 1
applying a variable voltage at the contact for the inner well, a threshold voltage for the first transistor being altered by the variable voltage
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, an insulating layer on a top surface of the substrate, and a first semiconductor transistor on the insulating layer, the transistor including an active region with a source region, a drain region, a channel region between the source and drain regions and a gate structure over the channel region, the gate structure extending beyond the transistor to an adjacent area. An outer well is included in the substrate, an inner well of an opposite type as the outer well situated within the outer well and under the active region and adjacent area, and a contact for the inner well in the adjacent area, the contact surrounding the gate structure. Operating the device includes applying a variable voltage at the contact for the inner well, a threshold voltage for the first transistor being altered by the variable voltage. The inner well and gate may be exposed and contacts created therefor together.