Body-Source-Tied SOI Transistor Structure for Low-Parasitic RF Linearity

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Solution Overview

Problem

Semiconductor-on-insulator (SOI) transistors in RF circuits face challenges in achieving high linearity while minimizing parasitic capacitance and noise, which are exacerbated by body contacts that increase gate resistance and parasitic capacitance.

Innovation Solution

The development of a body-source-tied SOI transistor structure that employs heavily-doped body implant regions overlapping source regions, with common silicided regions forming a robust and low-resistance electrical connection, eliminating the need for dedicated body contacts and reducing parasitic capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dedicated body contacts are connected to the transistor body to counteract body effects, then linearity is improved, but parasitic capacitance increases

Engineering Contradiction:
ImprovelinearityVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent merges the body contact function with the source contact by forming a common silicided region that electrically connects both the source region and the body region. This integration eliminates the need for a separate dedicated body contact, thereby maintaining linearity improvement while reducing parasitic capacitance associated with additional contact structures.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The common silicided region serves multiple functions: it acts as both the source contact and the body contact. This multi-functional structure achieves the body effect counteraction while minimizing the number of discrete components, thus reducing overall parasitic capacitance in the transistor structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If body contacted transistors employ gate structures overlying the transistor body, then body effects are controlled, but gate resistance increases

Engineering Contradiction:
Improvebody effects controlVSAvoidgate resistance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent combines the body contact function with the source contact structure, eliminating the need for separate body contacts that would require additional gate structures. The common silicided region provides body effect control without requiring extra gate overlays, thereby reducing gate resistance.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If body contacts are added to SOI transistors, then linearity is improved, but device footprint increases

Engineering Contradiction:
ImprovelinearityVSAvoiddevice footprint
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent integrates the body contact functionality into the existing source contact structure through the common silicided region. This merger eliminates the need for additional dedicated body contact structures, thereby maintaining linearity improvement while minimizing increase in device footprint.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances linearity and reduces noise in SOI transistors, offering improved performance without increasing parasitic capacitance, thereby improving the overall efficiency of RF circuits.

Implementation Method 1

common silicided regions forming a robust and low-resistance electrical connection

Methodology Applied
Scientific EffectSilicidation:

Implementation Method 2

heavily-doped body implant regions overlapping source regions, with common silicided regions forming a robust and low-resistance electrical connection

Methodology Applied
Scientific EffectElectrical Conduction: Conduction (electrical)

Data Source

PatentUS11756823B2Method for manufacturing body-source-tied SOI transistor
Publication Date: 2023.09.12 NEWPORT FAB LLC
  • US11756823B2 patent drawing
  • US11756823B2 patent drawing
  • US11756823B2 patent drawing

AI summary

A semiconductor-on-insulator (SOI) transistor includes a semiconductor layer situated over a buried oxide layer, the buried oxide layer being situated over a substrate. The SOI transistor is situated in the semiconductor layer and includes a transistor body, gate fingers, source regions, and drain regions. The transistor body has a first conductivity type. The source regions and the drain regions have a second conductivity type opposite to the first conductivity type. A heavily-doped body-implant region has the first conductivity type and overlaps at least one source region. A common silicided region electrically ties the heavily-doped body-implant region to the at least one source region. The common silicided region can include a source silicided region, and a body tie silicided region situated over the heavily-doped body-implant region. The source silicided region can be separated from a drain silicided region by the gate fingers.