SOI Trench DRAM Backside Strap Selective Epitaxy
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Solution Overview
Problem
The existing buried strap technology in DRAM cells faces challenges such as limited thermal budget, excessive dopant outdiffusion, and generation of extended crystal defects, which affect the integration density and reliability of memory cells.
Innovation Solution
The use of selective epitaxy to form a backside strap using heavily doped semiconductor material, which connects the pass transistor to the trench electrode, allowing for a higher thermal budget and reducing dopant diffusion and crystal defect formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If selective epitaxy is used to form a backside strap, then thermal budget is increased and dopant outdiffusion is reduced, but process complexity increases due to additional epitaxial deposition steps
Solution Approach 1:
The strap formation process is segmented into two distinct parts: a front-side component formed through conventional doping and a backside component formed through selective epitaxy. This segmentation allows each part to be optimized independently, with the backside epitaxial layer providing thermal isolation and reduced dopant diffusion while the front-side process maintains conventional simplicity.
Solution Approach 2:
The backside strap acts as an intermediary structure between the substrate and the front-side devices. By forming this intermediate epitaxial layer on the backside of the substrate, the patent mediates the thermal and electrical interactions, allowing higher thermal budgets for front-side processing while preventing excessive dopant outdiffusion through the substrate.
2Manufacturing precision
If conventional buried strap technology is used, then integration density is improved, but excessive dopant outdiffusion and crystal defect formation occur
Solution Approach 1:
Instead of forming the strap connection from the front side through the substrate (conventional approach), the patent inverts the approach by forming a backside strap from the opposite side of the substrate. This inversion allows the strap to be formed in a region with lower dopant concentration gradients, significantly reducing dopant outdiffusion and crystal defect formation while maintaining integration density.
3Productivity
If higher thermal budget is used for processing, then further processing capability is improved, but dopant outdiffusion increases
Solution Approach 1:
The patent extracts the dopant source from the backside region by forming an epitaxial layer that is inherently low in dopant concentration. This extraction allows high thermal budgets to be used for front-side processing without the risk of excessive dopant outdiffusion from the backside, as the dopant source has been effectively removed or isolated in the epitaxial structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables improved integration density and reduced electrical leakage by maintaining a higher thermal budget for further processing and providing effective stress relief without excessive dopant outdiffusion, thus enhancing the reliability of DRAM cells.
Implementation Method 1
epitaxially depositing first and second materials, where the first epitaxially-deposited material at least partially fills the undercut and electrically couples the contact of the capacitor to the doped portion of the top silicon layer
Implementation Method 2
reducing dopant diffusion and crystal defect formation
Data Source
AI summary
A semiconductor structure includes a SOI substrate having a top silicon layer overlying an insulation layer, which overlies a bottom silicon layer; a capacitor disposed at least partially in the insulation layer; a device disposed at least partially on the top silicon layer, which device is coupled to a doped portion of the top silicon layer; a backside strap of first epitaxially-deposited material, at least a first portion of the backside strap underlying the doped portion, the backside strap being coupled to the doped portion of the top silicon layer at a first end of the backside strap and to the capacitor at a second end of the backside strap; and second epitaxially-deposited material that at least partially overlies the doped portion of the top silicon layer, the second epitaxially-deposited material further at least partially overlying the first portion.