SOI Trench Electrode Layout for Low-Resistance High-Voltage Semiconductors

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Solution Overview

Problem

Current semiconductor devices face challenges in achieving low ON-resistance and high breakdown voltage characteristics, particularly in lateral semiconductor devices with conventional structures.

Innovation Solution

The semiconductor device incorporates a silicon-on-insulator (SOI) structure with a trench and embedded electrode configuration, where the embedded electrode is connected to the gate electrode and surrounded by an insulation film, enhancing the impurity concentration effect around the trench and improving breakdown voltage by expanding the depletion layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If a conventional lateral semiconductor device structure is used, then the device layout is simple, but the ON-resistance cannot be reduced sufficiently

Engineering Contradiction:
ImproveON-resistanceVSAvoiddevice structure
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The device is divided into multiple regions including a first region with source/drain regions and a second region with different impurity concentration. This segmentation allows optimization of current flow paths and reduces ON-resistance by creating specialized zones for different functions (current conduction, field control, impedance matching).

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the semiconductor device are assigned different impurity concentrations tailored to their specific functions. The first region has a first impurity concentration optimized for low resistance, while the second region has a second impurity concentration optimized for field control and breakdown voltage, achieving local optimization of electrical properties.

Inventive Principle:
Principle #3Local quality

2Strength

If the impurity concentration is increased to reduce ON-resistance, then the ON-resistance decreases, but the breakdown voltage deteriorates

Engineering Contradiction:
ImproveON-resistanceVSAvoidbreakdown voltage
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

The semiconductor device is divided into multiple regions with different impurity concentrations. The first region has a higher impurity concentration to reduce ON-resistance, while the second region has a lower impurity concentration to maintain high breakdown voltage. This spatial segmentation allows both contradictory requirements to be satisfied in different locations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each region is assigned a specific impurity concentration optimized for its function: the first region near the source/drain has high impurity concentration for low resistance, while the second region has low impurity concentration for high breakdown voltage. This local optimization resolves the contradiction between ON-resistance and breakdown voltage.

Inventive Principle:
Principle #3Local quality

3Reliability

If the depletion layer is expanded to increase breakdown voltage, then the breakdown voltage increases, but the ON-resistance increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidON-resistance
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The device structure separates the functions of breakdown voltage control and resistance control into different regions. The second region with lower impurity concentration supports a wider depletion layer for high breakdown voltage, while the first region with higher impurity concentration maintains low ON-resistance for current conduction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The impurity concentration is locally optimized in each region: the second region has low impurity concentration to enable wide depletion layer formation for high breakdown voltage, while the first region has high impurity concentration to maintain low ON-resistance. This local differentiation resolves the contradiction.

Inventive Principle:
Principle #3Local quality

4Reliability

If a trench structure with embedded electrode is added, then the breakdown voltage is enhanced by expanding the depletion layer, but the device complexity increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoiddevice structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The semiconductor device is divided into functional regions, with the second region specifically designed to support depletion layer expansion for high breakdown voltage. This segmentation enables the trench structure to be strategically placed where it provides maximum benefit while minimizing overall complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The trench structure with embedded electrode is implemented in the second region where low impurity concentration allows effective depletion layer expansion. This local implementation enhances breakdown voltage without unnecessarily complicating the entire device structure, as the trench is placed only where it provides functional benefit.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the ON-resistance and enhances the breakdown voltage of the semiconductor device by accumulating electrons in the semiconductor layer and expanding the depletion layer, respectively.

Implementation Method 1

accumulating electrons in the semiconductor layer

Methodology Applied
Scientific EffectElectron accumulation: Capacitance

Implementation Method 2

expanding the depletion layer

Methodology Applied
Scientific EffectDepletion layer expansion: Electric Field

Data Source

PatentUS20240421221A1Semiconductor device
Publication Date: 2024.12.19 ROHM CO LTD
  • US20240421221A1 patent drawing
  • US20240421221A1 patent drawing
  • US20240421221A1 patent drawing

AI summary

A semiconductor device includes: a semiconductor layer including a surface; a source region and a drain region arranged on the surface and separated from each other in a first direction as viewed in a thickness-wise direction orthogonal to the surface; a channel region formed on the surface between the source region and the drain region, the channel region being adjacent to the source region; a gate electrode arranged on the channel region with a gate insulating film disposed in between; a trench formed between the source region and the drain region; an insulation film arranged on inner walls of the trench; and an embedded electrode arranged in the trench and surrounded by the insulation film.