SOI Trench Isolation Width Control for Reliability
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Solution Overview
Problem
The existing dielectric isolation system using an SOI substrate and trench isolation in semiconductor devices faces issues with incomplete filling of buried insulating films in deep trenches, leading to recesses and hollows that can cause malfunction, increased parasitic capacitance, and reduced breakdown voltage, especially when trench widths exceed 1.2 μm.
Innovation Solution
The solution involves forming a semiconductor device with a deep trench isolation structure where the trench width in the LOCOS insulating film is narrower than in the active layer, with specific trench width variations to prevent recess formation and ensure complete filling of insulating films, using a combination of anisotropic and isotropic dry etching to achieve optimal trench dimensions and prevent breakdown voltage reduction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If trench width is increased to accommodate larger semiconductor elements, then integration density is improved, but incomplete filling of insulating films occurs leading to recesses and hollows that reduce breakdown voltage
Solution Approach 1:
The patent applies preliminary action by performing isotropic etching before anisotropic etching to create a tapered trench profile. This preliminary isotropic etching step widens the trench opening and prevents insulating film recession during subsequent processing, ensuring complete filling even when trench width is increased for larger semiconductor elements.
Solution Approach 2:
The patent changes the etching parameters by combining isotropic and anisotropic etching methods with specific control of etching conditions. This parameter change creates a tapered trench shape with wider opening, allowing complete insulating film filling while maintaining the required trench width for accommodating larger semiconductor elements.
2Reliability
If deep trench isolation is used to electrically isolate high breakdown voltage elements, then electrical isolation is improved, but recesses and hollows form in the insulating film leading to increased parasitic capacitance
Solution Approach 1:
The patent performs preliminary isotropic etching to create a tapered trench profile before filling with insulating film. This preliminary action prevents the formation of recesses and hollows that would otherwise increase parasitic capacitance, while maintaining deep trench isolation for electrical isolation of high breakdown voltage elements.
Solution Approach 2:
The patent applies local quality by creating a tapered trench shape with different widths at different depths. The wider opening at the top prevents insulating film recession and eliminates hollows, while the deeper portion maintains electrical isolation. This local variation in trench geometry eliminates parasitic capacitance while preserving electrical isolation functionality.
3Manufacturing precision
If anisotropic etching is used to form precise trench shapes, then manufacturing precision is improved, but damage layers remain on trench walls requiring additional cleaning steps
Solution Approach 1:
The patent merges isotropic etching and anisotropic etching into a single integrated process sequence. The isotropic etching step serves dual purposes: it creates the tapered trench profile for complete insulating film filling and simultaneously removes damage layers from trench walls. This merging eliminates the need for separate cleaning steps while maintaining precise trench geometry.
Solution Approach 2:
The patent implements continuity of useful action by making the etching process continuous and integrated. The isotropic etching followed by anisotropic etching creates a continuous tapered profile while the isotropic component continuously removes damage layers throughout the trench formation process, eliminating interruptions for separate cleaning operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach prevents deterioration in semiconductor device reliability by ensuring complete filling of insulating films and maintaining breakdown voltage, even when trench widths approach 1.2 μm, thereby enhancing the integration and reliability of high breakdown voltage semiconductor elements.
Implementation Method 1
etching the LOCOS insulating film and the active layer by using anisotropic dry etching
Implementation Method 2
isotropically etching the inner surface of the trench with radicals in order to clean the inner surface of the trench to remove contaminants therefrom and remove a defect layer on the inner surface of the trench
Implementation Method 3
depositing a second insulating film in the deep trench and on the first insulating film
Data Source
AI summary
To provide, in a semiconductor device formed on an SOI substrate and having a semiconductor layer of the SOI substrate surrounded, at the periphery of the element region thereof, with element isolation, a technology capable of preventing reliability deterioration attributed to the element isolation. Appearance of a hollow, which is formed upon filling of a deep trench with an insulating film, from the upper surface of the insulating film can be prevented by setting the trench width of the upper portion of the deep trench configuring trench isolation at less than 1.2 μm. Reduction in the breakdown voltage between adjacent element regions which may presumably occur due to a decrease in the trench width of the upper portion of the deep trench can be prevented by forming, on the upper portion of the deep trench, an LOCOS insulating film coupled to the insulating film filled in the deep trench.