SOI Undercut Formation on 300 mm Wafers Using Alternating Etch Cycles
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Solution Overview
Problem
Existing methods for creating undercuts in a 200 mm Silicon on Insulator (SOI) platform are time-consuming, requiring dedicated wet etching equipment and cannot be efficiently scaled to a 300 mm platform without significant additional costs.
Innovation Solution
A method combining bulk silicon dry etches and short wet etches is employed to create cavities underneath the insulator layer, allowing for efficient undercut formation by alternating dry and wet etching cycles to break silicon facets, reducing process time and enabling integration into a 300 mm platform using existing tools.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a selective isotropic bulk silicon etch followed by a longer wet etch is used, then the desired undercut dimensions are achieved, but the total process time increases to about 3 hours or more
Solution Approach 1:
The etching process is divided into multiple alternating cycles of dry etching and wet etching steps. Each cycle creates and then modifies cavities, with the dry etch creating initial cavities and the wet etch expanding them. This segmented approach allows for better control over the undercut formation while reducing total process time compared to a single long wet etch.
Solution Approach 2:
The method employs periodic alternation between dry etching and wet etching steps. The dry etch creates cavities and silicon facets, followed by wet etch that expands the cavities and breaks the facets. This periodic action is repeated for multiple cycles to achieve the desired undercut dimensions efficiently, reducing overall process time while maintaining precision.
2Manufacturing precision
If a dedicated wet etching bench is used for the wet etch, then the undercut can be created, but specific processing equipment is required and additional costs arise when transferring to 300 mm platform
Solution Approach 1:
The method is designed to be performed using standard processing equipment already available in 300 mm semiconductor fabrication facilities. By making the process universal and equipment-agnostic, it eliminates the need for dedicated wet etching benches and enables cost-effective scaling to 300 mm platforms without requiring specific or specialized processing equipment.
3Manufacturing precision
If wet etch is performed for 90 minutes with highly concentrated TMAH at 80° C., then the cavities are expanded, but the process time is extended and heat leakage occurs
Solution Approach 1:
The long continuous wet etch is segmented into multiple shorter wet etching steps interspersed with dry etching steps. Each wet etch step is followed by a dry etch that creates new cavities and breaks silicon facets, preventing the formation of slow-etching facet structures. This segmentation reduces the cumulative wet etching time from 90 minutes to approximately 10 minutes total while achieving better cavity expansion control.
Solution Approach 2:
The method changes the etching parameters by alternating between dry and wet etching modes rather than using a single prolonged wet etch. The dry etch steps modify the cavity structure and break facets that would otherwise slow down subsequent wet etching, effectively increasing the etch rate and reducing total processing time while improving cavity expansion efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method significantly reduces process time to about one hour, achieving desired undercut dimensions efficiently and cost-effectively in a 300 mm platform without the need for additional equipment.
Implementation Method 1
performing a first dry etch of the silicon substrate to create the one or more cavities underneath the insulator layer
Implementation Method 2
performing a first wet etch of the silicon substrate to expand the one or more cavities
Implementation Method 3
performing a second dry etch of the silicon substrate to further expand the one or more cavities and to break silicon facets created by the first wet etch
Data Source
AI summary
A Silicon on Insulator (SOI) structure and a method for creating an undercut (UCUT) in an SOI structure, in particular, for a 300 mm SOI platform, is provided. In particular, the method includes fabricating one or more cavities in a silicon substrate underneath an insulator layer of the SOI structure by performing a first dry etch of the silicon substrate to create the one or more cavities, performing a first wet etch of the silicon substrate to expand the one or more cavities, performing a second dry etch of the silicon substrate to further expand the one or more cavities and to break silicon facets created by the first wet etch, and performing a second wet etch to further expand the one or more cavities.