SOI Wafer Gettering Layer Structure for Metal Contamination Control
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Solution Overview
Problem
Metal contamination in silicon on insulator (SOI) substrates leads to crystal defects, junction leakage, and insulation breakdown, affecting the electrical properties and reliability of semiconductor devices.
Innovation Solution
A silicon on insulator structure is designed with a gettering layer interposed between an epitaxial layer and a buried oxide layer, utilizing materials like silicon, silicon germanium, silicon nitride, or silicon oxynitride to trap and remove metal impurities, thereby enhancing metal gettering ability and reducing contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a gettering layer is added between the epitaxial layer and buried oxide layer, then metal contamination is reduced, but device complexity increases
Solution Approach 1:
A gettering layer composed of silicon, silicon germanium, silicon nitride, or silicon oxynitride is inserted between the epitaxial layer and buried oxide layer to trap and remove metal impurities. This intermediary layer acts as a mediator that captures metal contaminants during fabrication, reducing metal contamination to levels below 1×10^9 atoms/cm² while maintaining the overall SOI structure functionality.
Solution Approach 2:
The gettering layer utilizes composite material properties by offering multiple material options (silicon, silicon germanium, silicon nitride, silicon oxynitride) with different characteristics. Each material provides specific gettering capabilities while allowing optimization based on particular device requirements, thus managing complexity through material selection rather than structural complexity.
2Reliability
If pre-processing to form bulk micro defects is performed, then metal gettering ability is improved, but manufacturing time and thermal budget increase
Solution Approach 1:
The gettering layer is pre-configured with inherent metal-trapping capabilities through its material composition and structural design. By establishing this gettering mechanism in advance during the layer formation process, the structure is prepared to capture metal impurities without requiring additional pre-processing steps to create bulk micro defects, thereby reducing manufacturing time and thermal budget.
Solution Approach 2:
The invention extracts the metal gettering function from the bulk substrate and concentrates it in a dedicated gettering layer. This extraction eliminates the need for bulk micro defect formation while maintaining effective metal trapping, as the gettering layer provides a localized, efficient pathway for metal impurity removal without the time-consuming pre-processing required for bulk defect creation.
3Reliability
If higher thermal budgets are used in manufacturing, then device performance is improved, but energy consumption and processing time increase
Solution Approach 1:
The gettering layer structure enables effective metal contamination control at lower thermal budgets by utilizing the inherent gettering properties of the layer materials. This parameter change allows the manufacturing process to achieve the same or better device performance with reduced thermal exposure, thereby lowering energy consumption and processing time while maintaining reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure effectively reduces metal contamination to levels below 1×10^9 atoms/cm², improves device reliability, and allows for lower thermal budgets in manufacturing, while eliminating the need for pre-processing to form bulk micro defects.
Implementation Method 1
A silicon on insulator structure is designed with a gettering layer interposed between an epitaxial layer and a buried oxide layer, utilizing materials like silicon, silicon germanium, silicon nitride, or silicon oxynitride to trap and remove metal impurities
Data Source
AI summary
A representative method of manufacturing a silicon-on-insulator (SOI) substrate includes steps of depositing an etch stop layer on a dummy wafer, growing an epitaxial silicon layer on the etch stop layer, forming a gettering layer on the epitaxial silicon layer, bonding a buried oxide layer of a main wafer to the gettering layer, and removing the dummy wafer and etch stop layer to expose the epitaxial silicon layer. The SOI substrate has an epitaxial silicon layer adjoining the gettering layer, with the gettering layer interposed between the buried oxide layer and the epitaxial silicon layer.


