SOI Wafer Fabrication With Impurity Gettering for Metal-Free Top Silicon

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Solution Overview

Problem

Silicon on insulator (SOI) technology faces challenges with metal contamination during the fabrication process, leading to surface defects and residual metal impurities in the top silicon layer, which affect the quality of semiconductor devices.

Innovation Solution

An impurity competing layer is introduced as a metal gettering layer on the dummy wafer to absorb and remove metal contaminants during the bonding and annealing process, reducing residual metal contamination in the SOI structure. This layer can be formed through various methods, including implantation or deposition, and is later removed after thinning, functioning as an etch-stop layer if needed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional bonding process is used to fabricate SOI structure, then manufacturing simplicity is maintained, but metal contamination and surface defects increase

Engineering Contradiction:
Improvemetal contamination reductionVSAvoidfabrication process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A dummy wafer is introduced as an intermediary component in the bonding process. The dummy wafer includes a dummy substrate and a device layer, which serves as a mediator to prevent metal contamination from transferring to the carrier wafer during bonding and annealing processes. This intermediary structure absorbs or traps metal impurities, thereby protecting the final SOI structure from contamination while maintaining process feasibility

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dummy wafer is prepared in advance with specific structural characteristics before the bonding process. The device layer on the dummy wafer is pre-configured to function as a metal gettering layer that will actively capture metal contaminants during subsequent bonding and annealing steps. This preliminary preparation ensures that the contamination prevention mechanism is already in place before the actual bonding occurs

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If bonding and annealing processes are performed, then SOI structure is formed, but residual metal impurities remain in the top silicon layer

Engineering Contradiction:
Improvetop silicon layer qualityVSAvoidresidual metal impurities
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The bonding and annealing processes, which normally cause metal contamination by mobilizing metal impurities, are converted into beneficial processes. The dummy wafer's device layer acts as a trap that captures these mobilized metal impurities during bonding and annealing. The harmful metal migration is redirected toward the dummy wafer instead of the carrier wafer, transforming a potentially damaging process into a contamination-prevention mechanism

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

Metal impurities are extracted from the carrier wafer and top silicon layer by transferring them to the dummy wafer during bonding and annealing processes. The dummy wafer serves as a removable container for these extracted impurities. After the bonding is complete, the dummy wafer can be removed, taking the captured metal contaminants with it, thereby leaving the carrier wafer and top silicon layer purified

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The implementation of the impurity competing layer effectively reduces metal contamination in the SOI structure, enhancing the quality and reliability of semiconductor devices by minimizing surface defects and residual metal impurities.

Implementation Method 1

An impurity competing layer is introduced as a metal gettering layer on the dummy wafer to absorb and remove metal contaminants during the bonding and annealing process

Methodology Applied
Scientific EffectGettering: Gettering

Implementation Method 2

performing an annealing process wherein the impurity competing layer absorbs metal from an upper portion of the dummy substrate

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS12040221B2Fabrication method of metal-free SOI wafer
Publication Date: 2024.07.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12040221B2 patent drawing
  • US12040221B2 patent drawing
  • US12040221B2 patent drawing

AI summary

Various embodiments of the present application are directed to a method for forming a semiconductor-on-insulator (SOI) device with an impurity competing layer to absorb potential contamination metal particles during an annealing process, and the SOI structure thereof. In some embodiments, an impurity competing layer is formed on the dummy substrate. An insulation layer is formed over a support substrate. A front side of the dummy wafer is bonded to the insulation layer. An annealing process is performed and the impurity competing layer absorbs metal from an upper portion of the dummy substrate. Then, a majority portion of the dummy substrate is removed including the impurity competing layer, leaving a device layer of the dummy substrate on the insulation layer.