Semiconductor-on-Insulator Wafer Transfer With ONO Bonding Layers

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Solution Overview

Problem

Current methods for manufacturing silicon-on-insulator (SOI) structures are time-consuming, costly, and lack suitable thickness uniformity, particularly for layers thinner than a few microns, and often require wastage of substrates and high-temperature processing.

Innovation Solution

A method involving the formation of an oxide-nitride-oxide (ONO) dielectric layer between a handle wafer and a donor wafer, where thermal oxidation and low-pressure chemical vapor deposition are used to create insulating layers, followed by plasma etching and annealing to achieve strong bonding and precise layer transfer without backside layers on the handle wafer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If wafer thinning techniques (etching or grinding) are used to remove the donor wafer, then layer transfer is achieved, but the process is time-consuming and costly with substrate wastage and poor thickness uniformity

Engineering Contradiction:
Improvethickness uniformityVSAvoidmanufacturing time
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent applies preliminary action by forming a damage layer in the donor wafer through ion implantation before bonding. This pre-created weakness plane enables subsequent easy separation along the desired depth, eliminating the need for time-consuming post-bonding thinning processes and achieving both high productivity and precise thickness uniformity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the physical state of the donor wafer by implanting ions to create a damage layer, transforming the material structure at the implantation depth. This parameter change enables the wafer to be easily separated along the damage layer after bonding, solving both the time consumption and thickness uniformity problems simultaneously.

Inventive Principle:
Principle #35Parameter changes

2Strength

If hydrogen implant followed by thermal annealing is used for layer transfer, then the bond is strengthened, but high temperatures are required and the process becomes complex

Engineering Contradiction:
Improvebond strengthVSAvoidprocess complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The patent performs preliminary damage layer formation via ion implantation before bonding. This pre-prepared weakness plane allows for simplified subsequent processing - the bond can be strengthened through annealing at lower temperatures compared to conventional methods, and layer separation occurs automatically along the pre-formed damage plane, reducing overall process complexity.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If conventional bonding methods are used, then substrates can be joined, but significant substrate wastage occurs

Engineering Contradiction:
Improvebonding reliabilityVSAvoidsubstrate wastage
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The patent creates a damage layer in the donor wafer before bonding, which serves as a predetermined separation plane. This allows the bonded structure to be easily separated after bonding, enabling recovery and reuse of the handle wafer and reducing substrate wastage while maintaining bonding reliability.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the production of SOI wafers with improved thickness uniformity and reduced substrate wastage, allowing for more efficient and cost-effective manufacturing with lower harmonic distortion and enhanced device performance.

Implementation Method 1

forming a front handle silicon dioxide layer on a front handle surface of a single crystal silicon handle wafer and a back handle silicon dioxide layer on a back handle surface of a single crystal silicon handle wafer by thermal oxidation of the single crystal silicon handle wafer

Methodology Applied
Scientific EffectThermal oxidation: Oxidation

Implementation Method 2

forming a front handle silicon nitride layer on the front handle silicon dioxide layer and a back handle silicon nitride layer on the back handle silicon dioxide layer by low pressure chemical vapor deposition

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Implementation Method 3

removing the back handle silicon nitride layer by plasma etching

Methodology Applied
Scientific EffectPlasma etching: Plasma

Implementation Method 4

The anneal may convert the terminal silanol groups to siloxane bonds between the two interfaces, thereby strengthening the bond

Methodology Applied
Scientific EffectThermal annealing: Annealing

Implementation Method 5

Particles (atoms or ionized atoms, e.g., hydrogen atoms or a combination of hydrogen and helium atoms) are implanted at a specified depth beneath the front surface of the donor wafer. The implanted particles form a cleave plane in the donor wafer at the specified depth

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 6

bonding by van der Waal's forces

Methodology Applied
Scientific EffectVan der Waals forces: Van der Waals Force

Data Source

PatentEP3993018B1Method of manufacture of a semiconductor on insulator structure
Publication Date: 2024.09.11 SUNEDISON SEMICON LTD
  • EP3993018B1 patent drawingFigure 1A~1B
  • EP3993018B1 patent drawingFigure 1C~2
  • EP3993018B1 patent drawingFigure 3

AI summary

A method is provided for preparing a semiconductor-on-insulator structure comprising a multilayer dielectric layer.