Bonded SOI Wafer Warpage Calculation and Compensation

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Solution Overview

Problem

Conventional methods for manufacturing bonded SOI wafers result in significant warpage when an epitaxial layer is formed on the SOI layer, particularly when the epitaxial layer has a higher resistivity than the SOI layer, leading to failures in photolithography and device manufacturing processes.

Innovation Solution

A method to calculate the warpage of a bonded SOI wafer by determining the warpage components A, B, and C, which occur due to epitaxial growth, BOX layer thickness, and initial base wafer warpage, allowing for the adjustment of manufacturing conditions to achieve a desired warpage in the bonded SOI wafer without actual epitaxial growth, using the ion implantation delamination method and thermal oxide film bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an epitaxial layer is formed on the SOI layer to achieve desired device configuration and resistivity, then the semiconductor device performance is improved, but significant warpage occurs leading to photolithography failures

Engineering Contradiction:
Improvedevice performanceVSAvoidwafer flatness
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by pre-forming a concave warpage on the base wafer before bonding the SOI layer. This pre-formed concave shape compensates for the convex warpage that will occur during subsequent epitaxial growth, ensuring the final wafer remains sufficiently flat for photolithography processes while maintaining the required epitaxial layer for device performance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs preliminary anti-action by creating a concave warpage (opposite direction) on the base wafer to counteract and cancel out the convex warpage generated during epitaxial growth. This opposing pre-action ensures that the net warpage after epitaxial layer formation remains within acceptable limits for manufacturing

Inventive Principle:
Principle #9Preliminary anti-action

2Manufacturing precision

If ion implantation delamination method is used to achieve excellent film thickness uniformity, then the SOI layer uniformity is improved, but the method cannot cope with thick SOI layers (several μm) due to limited ion implanter acceleration voltage

Engineering Contradiction:
ImproveSOI layer thickness uniformityVSAvoidSOI layer thickness range
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent merges two methods: it uses the ion implantation delamination method to create the initial bonded wafer with good uniformity, then combines this with epitaxial growth to add additional thickness. This combination allows achieving thick SOI layers (several μm) while maintaining the thickness uniformity benefits of ion implantation delamination

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent applies preliminary action by first forming a thin SOI layer through ion implantation delamination to establish good uniformity, then using this as a foundation for subsequent epitaxial growth that adds the required additional thickness without compromising the uniformity already achieved

Inventive Principle:
Principle #10Preliminary action

3Manufacturing precision

If a concave warpage is pre-formed on the base wafer to suppress warpage during epitaxial growth, then the final wafer flatness is improved, but the complexity of the manufacturing process increases

Engineering Contradiction:
Improvewafer flatnessVSAvoidmanufacturing process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies copying by using a mold or master wafer with a predetermined concave shape to replicate the same concave warpage pattern on multiple base wafers. This copying approach standardizes the pre-forming process, making it easier to control and implement across production while maintaining consistent warpage compensation

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the accurate prediction and control of warpage in bonded SOI wafers, reducing manufacturing costs and time, and ensuring the production of wafers with desired specifications for high-performance semiconductor devices.

Implementation Method 1

forming a thermal oxide film on one surface or both surfaces of one of a bond wafer (1) and a base wafer (2) that are formed of silicon single crystal wafers, bonding the bond wafer and the base wafer to each other through the thermal oxide film

Methodology Applied
Scientific EffectOxidation: Oxidation

Implementation Method 2

a method for implanting at least either hydrogen ions or rare gas ions into a bond wafer in advance to form an ion implanted layer and delaminating the bond wafer at the ion implanted layer after bonding

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 3

growing an epitaxial layer on a surface of the SOI layer

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Implementation Method 4

thereafter growing an epitaxial layer on a surface of the SOI layer

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Implementation Method 5

calculating a warpage A that occurs at the time of performing the epitaxial growth relative to the assumed silicon single crystal wafer; calculating a warpage B caused due to a thickness of the BOX layer

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentEP2741313B1Method for calculating warping of bonded SOI wafer and method for manufacturing bonded SOI wafer
Publication Date: 2020.04.01 SHIN ETSU HANDOTAI CO LTD
  • EP2741313B1 patent drawingFigure 1
  • EP2741313B1 patent drawing
  • EP2741313B1 patent drawing

AI summary

According to the present invention, there is provided a method for calculating a warpage of a bonded SOI wafer that is fabricated by forming a thermal oxide film on one surface or both surfaces of one of a bond wafer and a base wafer that are formed of silicon single crystal wafers, bonding the bond wafer and the base wafer to each other through the thermal oxide film, then reducing a film thickness of the bond wafer, thereby fabricating an epitaxial growth SOI wafer constituted of a BOX layer on the base wafer and an SOI layer on the BOX layer, and thereafter growing an epitaxial layer, the method comprising: assuming that the epitaxial growth SOI wafer is a silicon single crystal wafer having the same dopant concentration as dopant concentration of the bond wafer; calculating a warpage A that occurs at the time of performing the epitaxial growth relative to the assumed silicon single crystal wafer; calculating a warpage B caused due to a thickness of the BOX layer of the epitaxial growth SOI wafer; determining a measured value of a warpage of the base wafer before bonding as a warpage C; and calculating a sum of the warpages (A+B+C) as the warpage of the bonded SOI wafer.