Substrate-Embedded Optical Waveguide for SOI Chip Integration

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Solution Overview

Problem

Silicon-on-insulator (SOI) chip structures face limitations in integrating optical and electronic devices due to constraints on the dimensions of optical waveguide core layers, which affect the cut-off wavelength and functionality.

Innovation Solution

A substrate-embedded optical waveguide is formed within a trench in the substrate before wafer bonding, allowing for larger core layer dimensions and improved coupling with off-chip optical fibers, while FEOL processing forms additional optical and electronic devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If optical waveguide core layer dimensions are increased to improve cut-off wavelength and functionality, then optical signal propagation is improved, but the integration with electronic devices becomes difficult due to critical dimension constraints

Engineering Contradiction:
Improveoptical signal propagationVSAvoidintegration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent moves the optical waveguide from the surface plane to the substrate depth dimension by forming a trench into the substrate. This vertical positioning allows the waveguide core layer to achieve larger dimensions for improved optical propagation without conflicting with surface electronic device critical dimensions, effectively resolving the dimensionality conflict between optical and electronic integration

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the chip structure into distinct vertical zones: the substrate-embedded optical waveguide region and the surface electronic device region. By separating optical components into the substrate bulk and keeping electronic devices at the surface, the patent enables independent optimization of each subsystem without mutual interference, thus reducing overall device complexity

Inventive Principle:
Principle #1Segmentation

2Reliability

If substrate-embedded waveguide with larger core layer dimensions is used, then coupling with off-chip optical fibers is improved, but manufacturing process complexity increases

Engineering Contradiction:
Improvecoupling efficiencyVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent performs preliminary action by forming the optical waveguide trench and filling it with core and cladding materials before the wafer bonding step. This early formation of the optical waveguide structure allows for larger core dimensions and better coupling efficiency, while the subsequent bonding process integrates this pre-formed optical structure with electronic devices without requiring additional complex processing steps

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the cut-off wavelength and functionality of SOI chip structures by avoiding dimension limitations, enabling improved optical signal propagation and coupling with off-chip fibers.

Implementation Method 1

The first waveguide can include a cladding layer that lines the trench and a core layer on the cladding layer such that bottom and side surfaces of the core layer are wrapped by the cladding layer

Methodology Applied
Scientific EffectTotal internal reflection: Total Internal Reflection

Implementation Method 2

A substrate-embedded optical waveguide (referred to herein as a first waveguide) within the trench

Methodology Applied
Scientific EffectOptical waveguide: Waveguide (optics)

Data Source

PatentUS11448822B2Silicon-on-insulator chip structure with substrate-embedded optical waveguide and method
Publication Date: 2022.09.20 GLOBALFOUNDRIES US INC
  • US11448822B2 patent drawing
  • US11448822B2 patent drawing
  • US11448822B2 patent drawing

AI summary

Disclosed is a silicon-on-insulator (SOI) chip structure with a substrate-embedded optical waveguide. Also disclosed is a method for forming the SOI chip structure. In the method, an optical waveguide is formed within a trench in a bulk substrate prior to a wafer bonding process that results in the SOI structure. Subsequently, front-end-of-the-line (FEOL) processing can be performed to form additional optical devices and/or electronic devices in and/or above the silicon layer. By embedding an optical waveguide within the substrate prior to wafer bonding as opposed to forming it during FEOL processing, strict limitations on the dimensions of the core layer of the optical waveguide are avoided. The core layer of the substrate-embedded optical waveguide can be relatively large such that the cut-off wavelength can be relatively long. Thus, such a substrate-embedded optical waveguide brings different functionality to the SOI chip structure as compared to FEOL optical waveguides.