SOL Synchronization for Low-Latency GPU Data Exchange
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Solution Overview
Problem
Current GPU architectures face challenges in achieving strong scaling, which requires faster synchronization between multiple processors to enhance performance without increasing workload, as traditional synchronization methods incur high latency and bandwidth costs.
Innovation Solution
The introduction of a new synchronization primitive, referred to as 'speed of light' (SOL) synchronization, which enables producer and consumer processes to synchronize with low latency, approximately half a roundtrip time, using a combined store and arrive instruction that writes data and updates a barrier simultaneously, reducing the need for remote wait operations and optimizing data exchange across processors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional synchronization methods are used between multiple processors, then data consistency is maintained, but synchronization latency and bandwidth costs increase
Solution Approach 1:
The patent combines the store operation and barrier synchronization into a single atomic instruction. When a producer processor stores data to a shared memory location, the barrier is automatically updated atomically in the same instruction cycle, eliminating the need for separate synchronization operations and reducing latency while maintaining data consistency
Solution Approach 2:
The barrier value is pre-initialized to a non-zero value indicating pending data. The consumer processor can continuously check the barrier value without waiting for explicit synchronization signals, allowing it to immediately proceed when data is ready, thereby reducing waiting time while ensuring data consistency
2Productivity
If more parallel processors are added to increase computational throughput, then processing capacity improves, but synchronization overhead and bandwidth requirements increase
Solution Approach 1:
Each processor has its own local barrier register that it can read without requiring remote memory access. The barrier synchronization state is localized to each processor's address space, allowing consumers to check barrier status locally without consuming inter-processor bandwidth, thus enabling scalable parallel processing with minimal bandwidth overhead
3Reliability
If remote wait operations are used to ensure data availability, then data consistency is guaranteed, but operation latency increases
Solution Approach 1:
The barrier register serves as an intermediary between producer and consumer processors. Instead of the consumer directly waiting for or polling the producer, it monitors the barrier register which is automatically updated by the producer's store instruction. This intermediary mechanism provides reliable data availability notification without requiring the consumer to perform costly remote wait operations
Data Source
AI summary
A new synchronization system synchronizes data exchanges between producer processes and consumer processes which may be on the same or different processors in a multiprocessor system. The synchronization incurs less than one roundtrip of latency - in some implementations, in approximately 0.5 roundtrip times. A key aspect of the fast synchronization is that the producer’s data store is followed without delay with the updating of a barrier on which the consumer is waiting.