Solar Cell Shunt Prevention via Etching and Insulating Parts

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Solution Overview

Problem

The existing methods for fabricating solar cells often result in shunt circuits due to foreign matters like particles or second phases on the light absorbing layer, leading to efficiency degradation and unreliable connections between the light absorbing and front electrode layers.

Innovation Solution

A solar cell design that includes forming holes through the light absorbing and buffer layers via etching to remove foreign matters and an insulating part on the light absorbing layer to prevent shorts, ensuring smooth deposition of buffer layers and improving reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If foreign matters such as particles or second phases are present on the light absorbing layer, then the solar cell can be manufactured with standard deposition processes, but shunt circuits occur due to short between the light absorbing layer and the front electrode layer, degrading efficiency

Engineering Contradiction:
Improvedeposition processVSAvoidelectrical connection
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent extracts and removes foreign matters (particles or second phases) from the light absorbing layer surface through etching processes before depositing the buffer layer. This prevents the foreign matters from causing shunt circuits and ensures proper electrical connection between layers.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary etching treatment on the light absorbing layer surface before buffer layer deposition to remove foreign matters in advance. This preliminary action prevents subsequent short circuits and ensures smooth buffer layer formation.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If etching is performed on the light absorbing layer to remove foreign matters, then the buffer layer can be deposited smoothly, but the light absorbing layer surface may be damaged by etchant

Engineering Contradiction:
Improvebuffer layer depositionVSAvoidetchant damage
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies etching selectively only to areas with foreign matters on the light absorbing layer surface, rather than uniform etching across the entire surface. This localized treatment removes contaminants while preserving the integrity of the light absorbing layer in unaffected areas.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent introduces a buffer layer as an intermediary between the light absorbing layer and the front electrode layer. The buffer layer is deposited after etching to protect the light absorbing layer surface while enabling smooth electrical connection, thus mediating between the etching process and the final electrical performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If the buffer layer is deposited without removing foreign matters first, then the manufacturing process is simpler, but the buffer layer cannot be deposited smoothly, causing shunt circuits and efficiency degradation

Engineering Contradiction:
Improvefabrication processVSAvoidbuffer layer quality
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent performs preliminary etching treatment on the light absorbing layer surface before buffer layer deposition to remove foreign matters in advance. This preliminary action prevents subsequent short circuits and ensures smooth buffer layer formation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent extracts and removes foreign matters (particles or second phases) from the light absorbing layer surface through etching processes before depositing the buffer layer. This prevents the foreign matters from causing shunt circuits and ensures proper electrical connection between layers.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach prevents shunt circuits and enhances solar cell efficiency by ensuring the buffer layers are deposited smoothly, while also protecting the light absorbing layer from etchant damage and improving overall reliability.

Implementation Method 1

a buffer layer including cadmium sulfide (CdS) is formed on the light absorbing layer through a sputtering process

Methodology Applied
Scientific EffectSputtering: Sputtering

Implementation Method 2

a high resistance buffer layer including zinc oxide (ZnO) is formed on the buffer layer through the sputtering process

Methodology Applied
Scientific EffectSputtering: Sputtering

Implementation Method 3

a back electrode layer is formed on the substrate and patterned by a laser, thereby forming a plurality of back electrodes

Methodology Applied
Scientific EffectLaser ablation: Laser Ablation

Data Source

PatentUS9806207B2Solar cell and method for manufacturing same
Publication Date: 2017.10.31 LG INNOTEK CO LTD
  • US9806207B2 patent drawing
  • US9806207B2 patent drawing
  • US9806207B2 patent drawing

AI summary

A solar cell includes a support substrate, a back electrode layer on the support substrate, a light absorbing layer on the back electrode layer, a buffer layer on the light absorbing layer, a high resistance buffer layer on the buffer layer, and a front electrode layer on the high resistance buffer layer. An insulating part is located on a top surface of the light absorbing layer. A method of fabricating the solar cell includes forming the back electrode layer on the substrate, forming the light absorbing layer on the back electrode layer, forming the buffer layer on the light absorbing layer, oxidizing a top surface of the buffer layer, and forming the front electrode layer on the buffer layer.