Solar Optimizer Circuit Surge Protection for Low Light Stability
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Solution Overview
Problem
Solar photovoltaic panels experience unstable operation due to high internal impedance at low light conditions, leading to voltage reduction and potential transistor breakage from surge voltages when short-circuiting occurs.
Innovation Solution
A solar photovoltaic output optimizer circuit with a surge protection circuit connected in parallel to the inductance, featuring switching transistors and diodes to absorb surge voltages during low output states and automatically disconnect when output increases, preventing transistor damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If the PV panel operates at low light conditions, then the internal impedance increases, but the voltage reduces and stable operation becomes difficult
Solution Approach 1:
The patent applies dynamics by making the switching transistor Q6 operate dynamically based on the PV panel output state. The transistor switches between conducting mode (at low output/high impedance) and non-conducting mode (at normal output), allowing the circuit to adapt to varying light conditions and maintain stable operation across different illumination intensities.
Solution Approach 2:
The patent changes the electrical parameters of the circuit by introducing a switching transistor that alters the circuit configuration based on operating conditions. When the PV panel output is low, the transistor activates to provide a discharge path, changing the circuit's impedance characteristics and enabling stable operation at varying illumination levels.
2Object-affected harmful factors
If the switching transistor Q6 is always on to discharge inductance L1, then surge voltage is prevented, but the PV panel output is short-circuited and normal operation is prevented
Solution Approach 1:
The switching transistor Q6 is controlled dynamically rather than being permanently on or off. The control circuit monitors the PV panel output state and activates Q6 only when needed (at low output conditions) to discharge inductance L1, then deactivates it when normal operation resumes, preventing both surge voltage and short-circuiting.
Solution Approach 2:
The transistor Q6 operates periodically based on the PV panel output characteristics. It activates temporarily during low-output periods to prevent surge voltage, then deactivates during normal operation periods, creating a periodic on-off pattern that addresses surge protection without interfering with normal power generation.
3Strength
If the pulse width of gate signal is increased to prevent transistor breakage, then surge voltage is reduced, but the inductance L1 cannot be excited properly
Solution Approach 1:
The patent segments the protection function from the power transfer function by using a separate switching transistor Q6 dedicated to surge protection, while the main switching transistors Q1-Q5 handle inductance excitation. This segmentation allows the gate signal pulse width to be optimized for power transfer without compromising transistor protection, as Q6 provides independent protection during low-output conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution ensures stable operation and prevents transistor breakage by absorbing surge voltages during low output conditions, maintaining system stability despite varying solar panel outputs.
Implementation Method 1
an Aa interval, all the first to fifth switching transistors Q1 to Q5 are ON to excite the inductance L1; in an Ab interval, the first switching transistor Q1, the third switching transistor Q3 and the fourth switching transistor Q4 are turned OFF to thereby turn on the second switching transistor Q2 and the fifth switching transistor Q5
Implementation Method 2
a surge protection circuit 250 that is connected in parallel to the inductance L1, operates so as to absorb surge voltage to occur in output of the inductance L1 only when output of the PV panel is small
Data Source
AI summary
A solar photovoltaic output optimizer circuit includes a PV input device for receiving output of a solar photovoltaic panel; a switching device for converting a DC voltage input through the PV input device into a predetermined pulse voltage or AC voltage; and a voltage doubler rectification device for stepping up power output of the switching device to a predetermined voltage. The PV input device includes: an inductance L1 connected in series to “+” output of the PV panel; and a surge protection circuit that is connected in parallel to the inductance L1, operates so as to absorb surge voltage to occur in output of the inductance L1 only when output of the PV panel is small and normal control cannot be performed, and is automatically separated from the inductance L1 when the output of the PV panel is large.