Solder Barrier for Power Semiconductor Chip Short Prevention

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

During the soldering of power semiconductor chips to leadframes, electrical shorts and inconsistent bond line thicknesses due to solder spread are common issues, which need to be addressed to ensure reliable electrical coupling and consistent bonding.

Innovation Solution

The implementation of a solder barrier, which can be made of materials like Ag, Ni, or anti-wetting dielectric materials, is placed adjacent to the chip contacts and edges to prevent solder shorts and control bond line thickness by containing the solder during the reflow process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If solder is used to electrically couple chip contacts to the leadframe, then electrical coupling is achieved, but electrical shorts between chip contacts and edges may occur

Engineering Contradiction:
Improveelectrical coupling reliabilityVSAvoidelectrical shorting
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A solder barrier is introduced as an intermediary element between the chip contact and the solder material. This barrier prevents direct contact between solder and chip edges, thereby preventing electrical shorts while still allowing electrical coupling through the contact point. The solder barrier acts as a mediator that enables the beneficial electrical connection while blocking the harmful shorting path.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solder barrier segments the solder material into distinct regions, confining it to specific areas adjacent to chip contacts. This segmentation prevents solder from spreading uncontrollably to chip edges, thereby eliminating electrical shorts while maintaining necessary electrical connections. The segmentation creates isolated zones where solder is contained and controlled.

Inventive Principle:
Principle #1Segmentation

2Reliability

If solder is applied during chip attachment, then electrical coupling is achieved, but solder may spread out from underneath the chip leading to inconsistent bond line thicknesses

Engineering Contradiction:
Improveelectrical couplingVSAvoidbond line thickness consistency
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The solder barrier creates local quality differences by confining solder to specific regions adjacent to chip contacts. This local confinement ensures that solder is precisely positioned where needed for electrical coupling, while preventing it from spreading to areas where it would cause inconsistent bond line thicknesses. The local quality control achieves both reliable coupling and manufacturing precision.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The solder barrier serves as an intermediary structure that mediates between the solder material and the chip substrate. It controls the interface between solder and chip, ensuring consistent bond line thickness by preventing excessive solder spread while still allowing adequate solder for reliable electrical coupling. The intermediary maintains precise dimensional control.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If a solder barrier is added to prevent shorts and control bond line thickness, then reliability and manufacturing precision are improved, but device complexity increases

Engineering Contradiction:
Improveelectrical coupling reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The solder barrier is implemented as a thin film or coating applied to the leadframe or substrate, rather than a bulky three-dimensional structure. This thin film approach provides the necessary functionality of preventing shorts and controlling bond line thickness while adding minimal complexity to the device structure. The flexible thin film can be easily integrated into the existing manufacturing process.

Inventive Principle:
Principle #30Flexible shells and thin films

Solution Approach 2:

The solder barrier uses simple, inexpensive materials such as solder-resist coatings or thin metal layers that can be easily applied and integrated. These materials provide effective solder containment without requiring complex structures. The simplicity of the barrier material and its ease of integration minimize the increase in device complexity while achieving the desired reliability improvements.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solder barrier effectively prevents electrical shorts between chip contacts and edges, ensuring reliable electrical coupling and maintaining consistent bond line thicknesses, thereby enhancing the reliability and consistency of the semiconductor device assembly.

Implementation Method 1

solder may spread out from underneath the semiconductor chip leading to inconsistent bond line thicknesses

Methodology Applied
Scientific EffectSurface tension: Surface Tension

Implementation Method 2

solder barrier adjacent to the first contact and an edge of the chip... made of materials like Ag, Ni, or anti-wetting dielectric materials

Methodology Applied
Scientific EffectAnti-wetting: Wetting

Data Source

PatentUS9640459B1Semiconductor device including a solder barrier
Publication Date: 2017.05.02 INFINEON TECHNOLOGIES AG
  • US9640459B1 patent drawing
  • US9640459B1 patent drawing
  • US9640459B1 patent drawing

AI summary

A semiconductor device includes a leadframe and a semiconductor chip including a contact. The contact faces the leadframe and is electrically coupled to the leadframe via solder. The semiconductor device includes a solder barrier adjacent to the first contact and an edge of the chip.