Semiconductor Package Substrate Solder Bump Opening Geometry
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Solution Overview
Problem
The existing semiconductor devices face reliability issues due to local increases in current density and Joule heat generation at solder bumps, leading to potential voids and lifetime variations caused by electromigration, which are exacerbated by manufacturing variations and shape factors.
Innovation Solution
The semiconductor device design includes specific opening sizes and configurations for electrode pads and solder bumps, with L2/L1 ratios of 0.63 or more in cross-sectional views, to distribute current density more evenly and reduce stress, thereby minimizing lifetime variations and enhancing reliability without increasing device size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the solder bump is located in the opening of the insulating film with a smaller diameter, then the device can be miniaturized, but the current density locally increases and Joule heat generation increases, leading to void formation and reduced reliability
Solution Approach 1:
The patent applies local quality by creating a non-uniform opening shape where the width varies along the current flow direction. Specifically, the opening has a first width at the insulating film surface and a second width at the solder bump interface, with the second width being larger than the first. This local variation in geometry distributes the current density more evenly throughout the solder bump, preventing concentration at specific locations while maintaining overall device miniaturization.
Solution Approach 2:
The patent changes the geometric parameters of the opening, specifically the width dimension along the current flow path. By defining the width at different positions (first width at the top, second width at the bottom) and establishing a relationship between them (second width > first width), the patent optimizes current distribution. This parameter modification allows the device to maintain small size while avoiding the reliability issues associated with uniform narrow openings.
2Volume of moving object
If the opening shape and size vary due to manufacturing variations, then device miniaturization is achieved, but the current concentration varies, causing larger lifetime variations
Solution Approach 1:
The patent addresses manufacturing precision issues by designing an asymmetric opening profile where the width increases toward the solder bump interface. This local quality variation creates a more robust structure that is less sensitive to manufacturing tolerances. The gradual width increase provides a buffer against variations, ensuring that even with manufacturing deviations, the current density remains relatively uniform and predictable, thereby reducing lifetime variations.
Solution Approach 2:
The patent implements beforehand cushioning by pre-designing the opening geometry to compensate for potential manufacturing variations. The non-uniform width profile (narrower at the top, wider at the bottom) acts as a built-in compensation mechanism that cushions against the effects of manufacturing tolerances, ensuring stable current distribution and consistent device performance across production batches.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces lifetime variations and improves reliability by alleviating current concentration issues, allowing for miniaturization while maintaining performance, as demonstrated in reference experiments.
Implementation Method 1
when the current is supplied via the solder bump between the package substrate and the semiconductor chip, Joule heat is generated
Implementation Method 2
a void may be generated by electromigration in the vicinity of the semiconductor chip
Data Source
AI summary
A semiconductor device includes a package substrate, a semiconductor chip and a solder bump. The semiconductor chip is disposed on the package substrate. The package substrate includes a first electrode pad, and a first insulating film formed such that the first insulating film exposes a first portion of a surface of the first electrode pad. The semiconductor chip includes a second electrode pad and a second insulating film formed such that the second insulating film exposes a second portion of a surface of the second electrode pad. The second electrode pad is formed on the first electrode pad through the solder bump. L2/L1 is 0.63 or more in a cross section passing through the first electrode pad, the solder bump and the second electrode pad. A first length of the first portion and a second length of the second portion are defined as L1 and L2, respectively.