Solder Bump Receiving Metal for UBM-Free Substrate Integration
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Solution Overview
Problem
The existing process of forming under-bump metallizations (UBMs) to connect substrates with solder bumps is complex, time-consuming, and expensive, adding significant duration to the fabrication process and requiring transfer to a specialized foundry due to material incompatibilities and formation of low conductivity intermetallics and oxides.
Innovation Solution
A method involving the formation of a solder bump receiving metal layer on the substrate, which is metallurgically compatible with solder bumps, allowing direct connection without the need for UBMs, thereby simplifying the fabrication process and reducing the number of processing steps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If under-bump metallizations (UBMs) are formed to connect substrates with solder bumps, then metallurgical compatibility with solder bumps is achieved, but fabrication complexity and processing time increase significantly
Solution Approach 1:
The patent extracts and eliminates the UBM layer from the conventional substrate structure. Instead of forming complex multi-layer UBM structures, the invention uses a simplified substrate with exposed silicon dioxide surface that directly receives solder bumps, removing the problematic intermediate metallization layers while maintaining compatibility through surface preparation and bonding techniques
Solution Approach 2:
The patent changes the surface parameters of the substrate by treating the silicon dioxide surface to enhance its wetting properties and chemical compatibility with solder materials. This surface modification approach replaces the need for thick metallization layers while achieving the necessary metallurgical compatibility for reliable solder bump attachment
2Reliability
If under-bump metallizations (UBMs) are formed to ensure compatibility with solder bumps, then reliable electrical connection is achieved, but fabrication time increases by two to three months
Solution Approach 1:
The patent performs preliminary surface preparation and activation of the silicon dioxide substrate surface before solder bump application. By pre-treating the surface with appropriate chemicals or plasma to enhance reactivity and wetting, the invention eliminates the need for time-consuming UBM formation steps while ensuring reliable electrical connection from the outset
Solution Approach 2:
The invention removes the entire UBM formation process sequence from the fabrication flow, including deposition, patterning, and etching steps that collectively add months to the timeline. The direct substrate-to-solder bump approach maintains electrical reliability through optimized surface properties and bonding protocols
3Ease of manufacture
If standard CMOS foundry materials are used in the substrate, then material compatibility and ease of manufacture are improved, but direct connection to solder bumps becomes difficult due to metallurgical incompatibility
Solution Approach 1:
The patent converts the typically problematic silicon dioxide surface, which would normally require complex UBM layers for solder compatibility, into a beneficial direct-bonding surface. Through specific surface treatment and composition control, the silicon dioxide layer becomes chemically reactive and wettable by solder materials, eliminating the need for intermediate metallization while maintaining ease of CMOS fabrication
Solution Approach 2:
The invention modifies the surface parameters of the standard CMOS substrate by controlling the silicon dioxide layer's chemical composition, surface energy, and roughness characteristics. These parameter changes enable direct solder bump attachment to the substrate surface without requiring specialized foundry materials or complex UBM structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces fabrication time and complexity by eliminating the need for additional deposition, masking, and etching steps, while ensuring compatibility with standard CMOS foundry materials and enabling efficient electrical and mechanical connection with solder bumps.
Implementation Method 1
a solder bump receiving metal layer formed over the top interconnect metal layer of the first substrate, wherein the solder bump receiving metal layer comprises a material that is metallurgically compatible with a second substrate solder bump
Data Source
AI summary
A method of forming a semiconductor structure having a first substrate capable of electrically and mechanically connecting to a second substrate includes providing a first substrate without a solder bump. A solder bump receiving metal is formed over a top interconnect metal of the first substrate. The solder bump receiving metal may include platinum, a platinum alloy, nickel, or a nickel alloy. A passivation layer is formed, wherein the passivation layer is not situated under any portion of the solder bump receiving metal. A window is formed exposing a portion of the solder bump receiving metal. The method may further include providing a second substrate with a second substrate solder bump. The second substrate solder bump may be mechanically and electrically connecting to the exposed portion of the solder bump receiving metal of the first substrate.