Solder Bump Structure with Smaller Solder Layer Outer Diameter
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Solution Overview
Problem
In semiconductor device joining processes, mechanical precision and controllability issues lead to inclination and warpage, causing gap differences and potential short-circuits between solder bumps, especially when pitch is reduced, resulting in reduced yield and quality.
Innovation Solution
A semiconductor device design with a solder bump structure featuring a barrier metal layer and a solder layer where the solder layer has a smaller outer diameter than the barrier metal layer, and a stopper film is used to prevent the solder layer from spreading, ensuring precise formation and preventing short-circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the solder layer outer diameter is made equal to or larger than the barrier metal layer outer diameter, then the solder bump can be formed with sufficient volume, but the solder layer spreads excessively causing short-circuits between adjacent bumps when pitch is reduced
Solution Approach 1:
The patent applies local quality by making the solder layer outer diameter smaller than the barrier metal layer outer diameter, creating a localized configuration where the solder layer is intentionally reduced in size compared to the underlying barrier structure. This local differentiation prevents solder spread to adjacent areas while maintaining sufficient solder volume for reliable connections.
Solution Approach 2:
The patent implements preliminary action by forming the barrier metal layer with a larger outer diameter than the solder layer before the soldering process. This pre-configured barrier structure acts as a containment boundary that prevents solder from spreading beyond the intended area during the soldering process, especially when pitch is reduced.
2Productivity
If the pitch between solder bumps is reduced to increase integration, then more bumps can be placed on the substrate, but adjacent solder layers contact each other causing short-circuits
Solution Approach 1:
By creating a local quality difference where the solder layer is smaller than the barrier metal layer, the patent ensures that even when pitch is reduced, each solder bump is contained within its designated barrier boundary, preventing electrical isolation failure between adjacent bumps.
Solution Approach 2:
The patent introduces asymmetry in the solder bump structure by making the solder layer outer diameter smaller than the barrier metal layer outer diameter. This asymmetric configuration creates a safety margin that prevents adjacent solder layers from contacting each other even at reduced pitch, while the symmetric barrier metal layers maintain uniform spacing.
3Reliability
If the solder layer thickness is increased to compensate for gap differences, then connection reliability improves, but the solder layer spreads more easily causing short-circuits
Solution Approach 1:
The patent applies preliminary action by pre-forming the barrier metal layer with a larger outer diameter than the solder layer before soldering. This pre-configured barrier structure contains the solder layer during the soldering process, allowing sufficient solder volume for reliable connections while preventing excessive spread that would cause short-circuits.
Solution Approach 2:
By creating a localized configuration where the solder layer is smaller than the barrier metal layer, the patent enables the solder layer to have sufficient thickness for reliable connections while being contained within the barrier boundaries, preventing harmful spread to adjacent areas.
Data Source
AI summary
A semiconductor device includes: a solder bump including a barrier metal layer formed on an electrode pad portion of a substrate, and a solder layer formed at a central portion of an upper surface of the barrier metal layer so as to have a smaller outer diameter than that of the barrier metal layer.