Solder Cap Bump Height Uniformity via Solder Ball Reflow
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Solution Overview
Problem
Conventional methods for forming solder cap bumps in semiconductor packages face challenges with non-uniform height and limited material selection, leading to unreliable interconnections and low throughput.
Innovation Solution
A method involving the formation of conductive pillars on semiconductor substrates, followed by deposition of solder balls within predetermined openings, and subsequent reflow soldering to create uniform hemisphere solder caps, allowing for precise control of solder cap volume and material selection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If electroplating operation is used to form solder cap bumps, then material selection is limited to pure tin or Sn/Ag alloy, but manufacturing flexibility is reduced
Solution Approach 1:
The patent replaces the electroplating process with a solder ball placement process. Instead of using electroplating to deposit solder material, the invention uses a placement machine to position pre-formed solder balls onto the conductive pillars. This substitution enables the use of various solder alloys (Sn/Pb, Sn/Cu, Sn/Zn, etc.) that are difficult or impossible to deposit via electroplating, thereby improving material selection flexibility while maintaining manufacturing feasibility.
2Manufacturing precision
If electroplating operation is used to form solder cap bumps, then solder cap volume control is difficult, but height uniformity deteriorates
Solution Approach 1:
The patent employs preliminary action by pre-forming solder balls with precise dimensions before placement. The solder balls are manufactured in advance with controlled sizes (e.g., 0.3mm to 1.5mm diameter) using techniques like wire cutting or spherical forming. This preliminary preparation ensures that when the solder balls are placed on the conductive pillars, the resulting solder cap height is uniform across all bumps, eliminating the volume control difficulties associated with electroplating.
3Productivity
If electroplating operation is used to form solder cap bumps, then throughput is low, but productivity decreases
Solution Approach 1:
The patent replaces the time-consuming electroplating process with a rapid solder ball placement process. The placement machine can position multiple solder balls simultaneously or in rapid succession, significantly reducing the cycle time compared to electroplating. Additionally, since the solder balls are pre-formed, there is no need for lengthy electroplating deposition time, thereby improving manufacturing throughput and productivity.
4Reliability
If solder cap volume is not precisely controlled, then height uniformity is poor, but interconnection reliability deteriorates
Solution Approach 1:
The patent ensures interconnection reliability through preliminary action by using pre-formed solder balls with precisely controlled dimensions. The solder balls are manufactured with tight tolerances on diameter and spherical shape, ensuring consistent volume. When these uniform solder balls are placed on the conductive pillars and reflowed, they form solder caps with uniform height, which is critical for reliable electrical interconnection and mechanical bonding in the semiconductor package.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the uniformity and reliability of solder cap bumps, increasing manufacturing throughput and flexibility, thereby improving the interconnection between bumps and pads.
Implementation Method 1
An electroplating operation is performed to deposit conductive materials into the opening 132, and the exposed metallic layer 120 is used as a seed layer
Implementation Method 2
performing a reflow soldering on the solder ball to form a hemisphere solder cap on the conductive pillar
Data Source
AI summary
A semiconductor package with improved height uniformity of solder cap bumps therein is disclosed. In one embodiment, the semiconductor package includes a semiconductor substrate comprising a plurality of pads spacedly disposed on a top surface of the substrate, and a passivation layer formed on top of the pads, wherein a plurality of pad openings are created to expose at least a portion of the pads; a plurality of solder cap bumps formed at the pad openings of the passivation layer; and a carrier substrate having a plurality of bond pads electrically connected to the solder caps of the solder cap bumps on the semiconductor substrate. The solder cap bump includes a solder cap on top of a conductive pillar, and a patternable layer can be coated and patterned on a top surface of the conductive pillar to define an area for the solder ball to be deposited. The deposited solder ball can be reflowed to form the solder cap.