Solder Reservoir Pads for Microelectronic Assembly
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Solution Overview
Problem
The challenge in semiconductor chip assembly is achieving uniform solder deposition on microelectronic components, as excessive or insufficient solder can lead to electrical shorts or open circuits, particularly in applications requiring micron-level precision, where scaling down devices increases sensitivity to solder plating variations.
Innovation Solution
The implementation of a multi-chip system with top and bottom solder pads connected via conduits and reservoir pads allows for the flow of solder material to correct for over- or under-plating, utilizing surface tension and pressure differences to ensure proper alignment and connection between chips and substrates, thereby maintaining electrical and mechanical integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If solder material is deposited on UBM pads through electroplating, then electrical connections are established between circuits, but uniformity of solder plating deteriorates (variation on the order of 10%)
Solution Approach 1:
The patent applies preliminary action by depositing solder material on the substrate UBM pads before chip assembly. This allows the solder to be pre-positioned and controlled on the substrate, and then the chip is placed onto the substrate, enabling the solder to flow and self-align during the bonding process. This preliminary deposition on the substrate rather than the chip allows better control over solder distribution and reduces plating uniformity requirements.
2Reliability
If the amount of solder is increased to ensure complete electrical connection, then connection reliability improves, but spurious contacts between adjacent solder bumps occur causing electrical shorts
Solution Approach 1:
The patent applies local quality by creating non-uniform solder distribution patterns where different areas have different solder amounts. Specifically, the solder pads are designed with varying sizes, shapes, or solder material compositions in different locations to control solder flow locally. This allows sufficient solder in critical areas to ensure complete connections while limiting solder in other areas to prevent spurious contacts between adjacent bumps.
3Productivity
If space between solder connections is reduced to accommodate smaller microelectronic components, then component density increases, but sensitivity to solder plating variations increases
Solution Approach 1:
The patent applies parameter changes by modifying solder pad geometric parameters (size, shape, area) and material parameters (solder material composition, melting point) to compensate for reduced spacing. By adjusting these parameters, the solder flow characteristics can be optimized for high-density arrangements, making the system less sensitive to plating variations. For example, larger pad areas or specific material compositions can provide a broader process window that tolerates higher variation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of solder connections by adjusting solder distribution dynamically, reducing defects and system failures by maintaining uniformity and alignment during assembly, even in constrained spaces, and improves precision in opto-electronic assemblies.
Implementation Method 1
utilizing surface tension and pressure differences to ensure proper alignment and connection between chips and substrates
Implementation Method 2
utilizing surface tension and pressure differences to ensure proper alignment and connection between chips and substrates
Implementation Method 3
When the solder metals are heated beyond the melting temperature, the melted solder can wick adjacent UBM pads and establish electrical contacts between the two circuits in close contact
Implementation Method 4
This is typically accomplished through an electroplating process where the circuit is immersed in an electroplating bath during solder deposition
Data Source
AI summary
A multi-chip system includes a top chip stack element comprising a top chip having two major surfaces and top solder pads arrayed along a plane of one of the major surfaces; a bottom chip stack element comprising a bottom substrate having two major surfaces and bottom solder pads arrayed along a plane of one of the major surfaces; one or more solder reservoir pads connected to one or more of the top solder pads or of the bottom solder pads; and solder material; and wherein at least one of the top solder pads is connected to one of the bottom solder pads by one of the solder material.