Chip Package Solder Resist Edge Profile for Underfill Control
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Solution Overview
Problem
Conventional chip packages require a large amount of underfill material to cover corner spaces between solder mask edges, leading to potential overflow and defects, and miniaturized packages face insufficient underfill, risking oxidation of exposed circuit lines.
Innovation Solution
A modified solder resist layer profile is designed to reduce the required underfill quantity, ensuring that even a smaller amount can effectively cover circuit lines not protected by the solder resist layer, thereby preventing oxidation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large amount of underfill material is used to cover corner spaces, then the circuit lines are protected from oxidation, but the underfill material overflows to cover the solder mask causing defective products
Solution Approach 1:
The solder resist layer is designed with different coverage areas in different regions: it covers the circuit forming area and second line fragments while exposing the chip mounting area and underfill covering area. This local differentiation allows underfill to be precisely controlled to cover only the necessary first line fragments without overflowing onto the solder mask, thus protecting circuit lines while preventing defects
Solution Approach 2:
The solder resist layer is pre-configured with a specific profile before underfill application, defining clear boundaries between covered and exposed areas. This preliminary structuring ensures that when underfill is applied, it naturally fills only the intended corner spaces and first line fragments without requiring excessive material that would cause overflow
2Object-generated harmful factors
If the quantity of underfill material is reduced for miniaturized chip packages, then underfill overflow is prevented, but the corner spaces and circuit lines are insufficiently covered
Solution Approach 1:
The solder resist layer creates distinct functional zones: the circuit forming area with second line fragments is covered by solder resist, while the underfill covering area with first line fragments is exposed. This local quality differentiation ensures that reduced underfill quantities are precisely directed to where they are needed (first line fragments and corner spaces) without being wasted on areas already protected by solder resist, maintaining reliability in miniaturized packages
Solution Approach 2:
The circuit board surface is segmented into different functional areas with different protection requirements: circuit forming area (covered by solder resist), underfill covering area (exposed for underfill application), and chip mounting area (exposed). This segmentation allows optimized underfill distribution where smaller quantities efficiently cover the exposed first line fragments and corner spaces without overflow
Data Source
AI summary
A chip package includes a circuit board, a chip and an underfill. A solder resist layer formed on the circuit board is modified in edge profile so as to reduce required amount of the underfill. The fewer underfill is still enough to be filled between the circuit board and the chip, and still can cover circuit lines that are not covered by the solder resist layer to protect the circuit lines from oxidation.