Solderable Heat Spreader Interfaces for Multi-Die Step Height Control
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Solution Overview
Problem
Warpage and thermal performance issues in thin integrated circuit (IC) device packages due to differences in temperature coefficients of thermal expansion between device and package materials, leading to pump-out of thermal interface material (TIM) and reduced thermal performance.
Innovation Solution
Fabrication of solderable thermal interface structures on IC dies and heat spreaders with varying thicknesses and patterning of metal layers to accommodate different IC die thicknesses, using techniques like subtractive and additive methods for precise placement of solder TIM thermal interconnects, and integration with non-metallic materials like graphite for improved thermal conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If thermal interface material (TIM) is used to accommodate step height variation between neighboring IC dies, then manufacturing adaptability is improved, but TIM thickness increases leading to degraded thermal performance
Solution Approach 1:
The patent segments the TIM into two functional components: a solder array with controlled height that accommodates step variation, and a thin TIM layer that maintains low thermal resistance. This segmentation allows the solder array to handle the mechanical accommodation function while the thin TIM layer preserves thermal performance by minimizing thickness.
Solution Approach 2:
The solder array acts as an intermediary structure between the IC die and heat spreader, providing a height-adjustable interface that accommodates step variation. This intermediary enables the use of thinner TIM layers since the solder array absorbs the height compensation function, thereby improving thermal performance.
2Reliability
If TIM thickness is reduced to improve thermal performance, then thermal resistance decreases, but ability to accommodate die thickness variation is reduced
Solution Approach 1:
The patent segments the interface structure into a height-adjustable solder array component and a thin TIM layer component. The solder array provides the necessary height variation accommodation while the thin TIM layer maintains low thermal resistance, thus resolving the contradiction between thermal performance and adaptability.
Solution Approach 2:
The solder array provides localized height adjustment at specific contact points between the IC die and heat spreader. This localized quality approach allows the TIM layer to remain thin overall while still accommodating die thickness variation at specific locations where the solder array is present.
3Adaptability or versatility
If solderable thermal interface structures with varying thicknesses are fabricated, then adaptability to different IC die thicknesses is improved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the thickness variation accommodation function into the solder array structure, which can be manufactured with controlled heights using standard semiconductor fabrication techniques. This segmentation allows the rest of the heat spreader to maintain uniform thickness, simplifying manufacturing compared to creating a fully variable thickness structure.
Solution Approach 2:
The patent applies local quality by creating solder arrays with specific heights only at locations corresponding to thinner IC dies, while maintaining uniform thickness elsewhere. This localized approach to thickness variation reduces manufacturing complexity compared to creating a continuously variable thickness structure across the entire heat spreader.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces thermal resistance and minimizes TIM thickness to less than 100 μm, effectively addressing warpage and enhancing thermal performance by maintaining a stable spatial distribution of solder TIM features across IC dies of varying thicknesses.
Implementation Method 1
a plurality of solder TIM thermal interconnects 250, 260 distributed over an area of the heat spreader 275, 278 and/or IC die 205, 210... reduces thermal resistance
Implementation Method 2
The heat spreader 275, 278 may include a metallized layer 272 on a surface facing the plurality of solder TIM thermal interconnects 250, 260... assembled together with a plurality of thermal interconnects comprising solder
Implementation Method 3
An integrated thermal heat spreader may include a non-metallic material, such as a graphite sheet... having high in-plane thermal conductivity
Data Source
AI summary
Thermal heat spreaders and/or an IC die with solderable thermal structures may be assembled together with a solder array thermal interconnects. A thermal heat spreader may include a non-metallic material and one or more metallized surfaces suitable for bonding to a solder alloy employed as thermal interface material between the heat spreader and an IC die. An IC die may include a metallized back-side surface similarly suitable for bonding to a thermal interconnect comprising a solder alloy. Metallization on the IC die and/or heat spreader may comprise a plurality of solderable structures. A multi-chip package may include multiple IC die having different die thickness that are accommodated by a z-height thickness variation in the thermal interconnects and/or the solderable structures of the IC die or heat spreader.


