Solid-Electrolyte Interconnect Structure for Low-Resistance Scaling
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Solution Overview
Problem
The miniaturization of semiconductor devices leads to increased resistance values in interconnects, which is a challenge in maintaining efficient electrical connectivity.
Innovation Solution
An interconnect structure comprising a metal interconnect layer, a metal layer opposite to the interconnect layer, and a solid electrolyte layer between them, which electrically insulates the interconnect layer from the metal layer and reduces resistance by applying a voltage to the solid electrolyte layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the interconnect size is miniaturized to reduce device size, then the device dimensions are reduced, but the resistance value of the interconnect increases
Solution Approach 1:
The patent employs a composite interconnect structure consisting of a first interconnect layer (e.g., copper or cobalt), a barrier layer (e.g., tungsten nitride or tantalum nitride), and a second interconnect layer (e.g., cobalt or tungsten). This multi-material composite approach allows each layer to contribute specific properties: the barrier layer provides adhesion and diffusion prevention, while the metal layers provide conductivity. This composite structure maintains low resistance even when the overall interconnect dimensions are miniaturized.
Solution Approach 2:
The patent changes the physical and chemical parameters of the interconnect structure by controlling the thickness, composition, and crystalline structure of each layer. For example, the barrier layer thickness is optimized to be thin enough to maintain conductivity but thick enough to prevent diffusion, and the metal layers are engineered with specific grain structures to minimize resistivity. These parameter optimizations enable the interconnect to maintain low resistance at miniaturized dimensions.
2Area of moving object
If the interconnect cross-sectional area is reduced to achieve miniaturization, then the device scale is reduced, but the resistance value increases due to smaller conductive path
Solution Approach 1:
The composite interconnect structure with multiple functional layers allows for reduced cross-sectional area while maintaining low resistance. The barrier layer, though thin, provides sufficient adhesion and diffusion barrier functionality, enabling the metal layers to be configured with optimized cross-sectional dimensions that minimize resistance without compromising device scaling.
Solution Approach 2:
The patent applies local quality by giving different regions of the interconnect structure different properties: the barrier layer has high barrier properties at the interface with the semiconductor substrate, while the metal layers have high conductivity in the current transport path. This localized optimization of properties allows the cross-sectional area to be minimized while maintaining low resistance where it matters most.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed interconnect structure effectively reduces the increased resistance values in miniaturized interconnects, enhancing the electrical performance and connectivity of semiconductor devices.
Implementation Method 1
The interconnect layer and the metal layer are electrically insulated from each other by the solid electrolyte layer
Implementation Method 2
transmitting an electrical signal from the active element to the interconnect layer or from the interconnect layer to the active element with a voltage applied to the solid electrolyte layer
Data Source
AI summary
An interconnect structure includes: an interconnect layer containing a metal element as a main component and extending in a direction; a metal layer opposite to the interconnect layer, and a solid electrolyte layer between the interconnect layer and the metal layer. The solid electrolyte layer encloses the interconnect layer at least in a cross-sectional view taken along a plane orthogonal to the direction. The interconnect layer and the metal layer are electrically insulated from each other by the solid electrolyte layer.