Solid-State Bias Tee for Unified Static and Dynamic DUT Characterization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional characterization of semiconductor devices, particularly high power FETs, requires separate static and dynamic measurement platforms, and traditional impedance measurement tools like bias tees have limitations in integration and frequency range, complicating the characterization process.
Innovation Solution
A unified measurement system combining static and dynamic characterization capabilities, using a dual-purpose platform with integrated high voltage circuitry and a solid-state bias tee that eliminates the need for conventional bias tees, allowing simultaneous static and dynamic measurements without re-cabling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate static and dynamic measurement platforms are used, then measurement precision is maintained, but device complexity and ease of operation deteriorate due to requiring multiple platforms and re-cabling
Solution Approach 1:
The patent combines separate static and dynamic measurement platforms into a single integrated measurement system. The system includes a unified measurement platform with integrated circuitry that can perform both static I/V characterization and dynamic switching parameter measurements without requiring external re-cabling or platform changes, thus reducing device complexity while maintaining measurement precision through dedicated measurement circuits for each mode.
Solution Approach 2:
The measurement system is designed with multi-functionality to perform both static and dynamic characterization modes using the same hardware platform. The system includes switchable measurement circuits that can operate in different modes (static I/V, dynamic switching, impedance measurement) without requiring external reconfiguration, making a single device serve multiple characterization purposes.
2Measurement precision
If conventional bias tees are used for impedance measurement, then measurement capability is provided, but ease of operation and adaptability worsen due to current and frequency limitations and integration complexity
Solution Approach 1:
The patent extracts the bias tee functionality from external discrete components and integrates it directly into the measurement platform's circuitry. The integrated bias tee circuits are built-in with no external components required, eliminating the current and frequency limitations of external bias tees and allowing the system to handle high power devices across wide frequency ranges without external reconfiguration.
Solution Approach 2:
The patent merges the bias tee functionality with the main measurement platform circuitry, combining DC biasing and RF signal injection capabilities into a single integrated system. This integration allows simultaneous DC and AC measurements on high power FETs without the limitations of external bias tees, expanding both frequency and voltage range adaptability.
3Measurement precision
If multiple separate platforms are used for static and dynamic characterization, then measurement precision is maintained, but productivity and loss of time worsen due to requiring re-cabling and platform switching
Solution Approach 1:
The patent merges static and dynamic characterization capabilities into a single measurement platform that can switch between modes without physical reconfiguration. The system includes integrated switching circuitry and measurement channels that allow seamless transition between static I/V measurements and dynamic switching parameter measurements, eliminating the time required for re-cabling and platform switching while maintaining measurement precision through dedicated circuits for each mode.
Data Source
AI summary
A test and measurement system includes a device under test (DUT) interface structured to couple to first and second DUTs that are coupled to form a half bridge circuit. A characterization circuit is controlled to perform static testing and dynamic testing of the first and second DUTs. The characterization circuit includes a solid-state bias tee including the first DUT and a first drive voltage generator that provides a DC pulse signal and AC signal on a gate node of the first DUT to cause the first DUT to supply current and voltage signals to the second DUT for static and dynamic characterization of the second DUT. One characterization circuit can generate, at the same time, the gate charge characterization parameters for one DUT and reverse current path (e.g., body diode) characterization of another DUT.