Solid-State Imaging Device Vertical Charge Transfer

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Solution Overview

Problem

Conventional CMOS solid-state imaging devices face challenges in achieving miniaturization, improving sensitivity, and enhancing saturated charge amount while maintaining image quality, particularly in applications requiring simultaneous exposure and reduced focal plane distortion.

Innovation Solution

A solid-state imaging device with a stacked structure of first and second charge accumulation units and vertical transfer transistors, allowing for simultaneous transfer and readout of signal charges, which reduces pixel area and minimizes noise by eliminating the need for mechanical shutters and light-shielding films.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a mechanical shutter is used to achieve global exposure, then simultaneity of exposure time is improved, but device size increases and mechanical driving speed is limited

Engineering Contradiction:
Improvesimultaneity of exposure timeVSAvoiddevice size
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent replaces the mechanical shutter system with an electrical control system using transfer transistors. The first transfer transistor transfers charges simultaneously from all photodiodes to the first charge accumulation unit, eliminating mechanical moving parts while achieving global shutter functionality. This substitution resolves the contradiction by maintaining exposure simultaneity without increasing device size or relying on mechanical driving speed limitations.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Object-affected harmful factors

If a light-shielding film is provided over the charge accumulation unit to prevent noise, then noise is reduced, but opening area of photodiode is reduced and sensitivity deteriorates

Engineering Contradiction:
ImprovenoiseVSAvoidsensitivity
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

The patent moves the charge accumulation units to a different spatial dimension by stacking the first charge accumulation unit directly over the second charge accumulation unit in the vertical direction. This three-dimensional arrangement allows the charge accumulation units to be positioned close to photodiodes for effective noise prevention without blocking the horizontal opening area, thus maintaining sensitivity while reducing noise.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Measurement precision

If charges are held in the floating diffusion until readout time, then global exposure is achieved, but signal charges leak out or deteriorate due to noise

Engineering Contradiction:
Improvesimultaneity of exposureVSAvoidsignal charge quality
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements preliminary action by immediately transferring charges from photodiodes to the first charge accumulation unit right after exposure, before the charges can leak or deteriorate. The first transfer transistor is activated to move charges from all photodiodes simultaneously to the first charge accumulation unit, which then transfers them to the second charge accumulation unit for storage until readout. This preliminary transfer action preserves signal charge quality while maintaining global exposure functionality.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If a memory unit is mounted separately from the floating diffusion to accumulate charges, then charge accumulation is improved, but area where light is blocked increases and sensitivity deteriorates

Engineering Contradiction:
Improvecharge accumulationVSAvoidsensitivity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent resolves this contradiction by stacking the first charge accumulation unit over the second charge accumulation unit in the vertical direction, utilizing the third dimension. This vertical stacking allows charge accumulation units to be positioned close to photodiodes for effective charge collection without increasing the horizontal footprint that would block light. The multi-layer stacked structure enables improved charge accumulation while maintaining high sensitivity through preserved opening area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables miniaturization of pixels, improved sensitivity, and higher image quality by synchronizing exposure across all pixels and reducing noise, effectively addressing the limitations of existing technologies.

Implementation Method 1

a photoelectric conversion unit, and accumulates the signal charges generated in the photoelectric conversion unit

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Data Source

PatentUS10236318B2Solid-state imaging device, driving method for solid-state imaging device, and electronic appliance
Publication Date: 2019.03.19 SONY SEMICON SOLUTIONS CORP
  • US10236318B2 patent drawing
  • US10236318B2 patent drawing
  • US10236318B2 patent drawing

AI summary

The present disclosure relates to a solid-state imaging device, a driving method for the same, and an electronic appliance, and an object is to provide a solid-state imaging device that can achieve the pixel miniaturization and the global shutter function with higher sensitivity and saturated charge amount. Another object is to provide an electronic appliance including the solid-state imaging device. In a solid-state imaging device 1 having the global shutter function, a first charge accumulation unit 18 and a second charge accumulation unit 25 are stacked in the depth direction of a substrate 12, and the transfer of the signal charges from the first charge accumulation unit 12 to the second charge accumulation unit 25 is conducted by a vertical first transfer transistor Tr1. Thus, the pixel miniaturization can be achieved.