Solid State Memory End of Life Extension via Error Tracking

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Solution Overview

Problem

Solid state memory devices, such as NAND flash memory, face limitations in operational life due to wear and tear, leading to increased read errors as they approach the end of life (EOL) condition, necessitating effective management to extend their lifespan and ensure reliable data retrieval.

Innovation Solution

A control circuit maintains a data structure tracking readback error rates and erasure counts, retiring memory locations from service when they reach EOL, using an exception list to identify and rehabilitate or retire pages with high error rates, thereby extending the memory's operational life and maintaining acceptable read error rates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory locations are continuously used beyond the specified end of life (EOL) condition, then the productivity and utilization of the memory device is improved, but the reliability deteriorates due to increased read errors and wear

Engineering Contradiction:
Improvememory utilizationVSAvoidread error rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The memory device is segmented into active memory locations and retired memory locations. The controller maintains a data structure that divides the memory space, allowing healthy locations to remain productive while isolating worn-out locations that exhibit high read error rates. This segmentation enables continued utilization of functional memory regions while excluding degraded regions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes the operational status parameter of memory locations from active to retired based on monitored read error rates and erasure counts. By dynamically adjusting the可用性 parameter of memory locations based on their degradation state, the system maintains overall reliability while maximizing the utilization of healthy memory regions.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If memory locations with high read error rates are continued to be used, then the productivity is improved, but the reliability deteriorates due to data retrieval errors

Engineering Contradiction:
Improvedata storage capacityVSAvoiddata retrieval accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The controller implements a feedback mechanism by monitoring read error rates for each memory location and using this information to determine when to retire locations. The data structure stores error rate information that feeds back into the retirement decision process, allowing the system to respond to degradation and maintain data retrieval reliability while preserving usable capacity.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system treats individual memory locations as disposable units that can be retired when they reach their operational lifespan. By retiring individual faulty locations rather than the entire memory device, the system discards only the degraded portions while maintaining the functionality and capacity of healthy locations.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Reliability

If the memory device is retired at the specified end of life (EOL) condition, then the reliability is maintained, but the productivity is reduced due to premature retirement

Engineering Contradiction:
Improveread error rate guaranteeVSAvoidoperational lifespan
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system applies local quality management by treating each memory location independently with its own quality assessment based on read error rates. Rather than retiring the entire device at a uniform EOL threshold, the system maintains local quality control, allowing individual locations to be retired based on their specific degradation state while others continue operating.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The controller performs preliminary actions by monitoring and tracking read error rates before actual failures occur. By proactively identifying locations that are approaching degradation thresholds and retiring them preemptively, the system prevents reliability deterioration while extending the overall operational lifespan of the memory device.

Inventive Principle:
Principle #10Preliminary action

4Device complexity

If no exception list is maintained, then the device complexity is reduced, but the reliability deteriorates due to inability to identify and retire faulty pages

Engineering Contradiction:
Improvedata structure overheadVSAvoiderror rate management
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The exception list serves as an intermediary data structure that mediates between the physical memory locations and the controller's retirement decisions. This intermediate structure stores error rate information and facilitates the identification of faulty pages without requiring complex real-time analysis during normal operations, thus balancing reliability management with acceptable device complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9910606B2End of life extension of solid state memory
Publication Date: 2018.03.06 SEAGATE TECH LLC
  • US9910606B2 patent drawing
  • US9910606B2 patent drawing
  • US9910606B2 patent drawing

AI summary

Method and apparatus for managing a solid state memory, such as but not limited to a NAND flash memory. In some embodiments, a storage device includes a non-volatile solid state memory and a control circuit configured to transfer user data between the memory and a host device. The control circuit maintains, in a local memory, a data structure indicative of measured readback error rates associated with memory locations in the memory in relation to erasure counts associated with the memory locations. The control circuit retires a subset of the memory locations identified by the data structure from further availability to store user data from the host device responsive to the measured readback error rates, and responsive to the erasure counts of said memory locations indicating the memory has reached an end of life (EOL) condition.