High Speed Solid State Relay Circuit Using MOSFET Gate Drive

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Solution Overview

Problem

Existing solid-state relays face drawbacks such as high cost due to numerous components in current limiting circuits and slower switching speeds compared to other devices.

Innovation Solution

A high-speed switching circuit incorporating a bridge rectifier, MOSFET, optical isolator, current limiting resistors and diodes, and a Zener diode to clamp voltage, enabling efficient current and voltage regulation for the MOSFET, thereby reducing component count and increasing switching speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional current limiting circuits are used in solid state relays, then current protection is provided, but component count increases and cost increases

Engineering Contradiction:
Improvecurrent protectionVSAvoidcomponent count
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the current limiting function with the gate drive circuit by using the gate resistors (R1, R2) to serve dual purposes: limiting gate current during switching and limiting source current during fault conditions. This integration eliminates the need for separate current limiting components while maintaining both gate drive and overcurrent protection functions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate resistors are designed to perform multiple functions simultaneously: they limit the current flowing into the MOSFET gate during switching transitions, and they also limit the source current when the MOSFET is in the linear region or during fault conditions. This multi-functionality reduces the overall component count while providing comprehensive protection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Power

If conventional solid state relays are used, then power control is achieved, but switching speed is slower compared to other devices

Engineering Contradiction:
Improvepower controlVSAvoidswitching speed
Core Design Contradiction:
PowerVSSpeed

Solution Approach 1:

The patent optimizes the gate drive circuit parameters, specifically using low-value gate resistors (R1=10Ω, R2=10Ω) to minimize the RC time constant of the MOSFET gate. This parameter optimization enables faster charging and discharging of the gate capacitance, achieving switching speeds greater than 100kHz while maintaining effective power control capability.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If voltage limiting is implemented in solid state relays, then MOSFET protection is provided, but component count increases

Engineering Contradiction:
ImproveMOSFET protectionVSAvoidcomponent count
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent integrates the voltage limiting function into the existing gate drive circuit by using the Zener diode (D3) in conjunction with the gate resistors. The Zener diode clamps the gate voltage to a safe level (5.1V) while the gate resistors limit the current through the Zener diode. This integrated approach provides comprehensive MOSFET protection without adding excessive components.

Inventive Principle:
Principle #5Merging (Combining)

4Reliability

If isolation circuits are added to solid state relays, then electrical isolation is achieved, but device complexity increases

Engineering Contradiction:
Improveelectrical isolationVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent uses an optocoupler (U1) as an intermediary device to provide electrical isolation between the control circuit and the power circuit. The optocoupler transfers the control signal optically, achieving galvanic isolation while maintaining signal transmission. This approach provides reliable isolation without requiring complex isolation circuits, as the optocoupler integrates both isolation and signal coupling functions in a single component.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution provides a cost-effective, high-speed switching circuit with improved power ratings and reliability, addressing the limitations of existing solid-state relays by reducing component count and enhancing switching speed.

Implementation Method 1

The isolator circuit comprises an optically-coupled LED. The isolator circuit is configured to receive a logic input signal and generate an isolated output signal based on the logic input signal

Methodology Applied
Scientific EffectOptical coupling: Light Emitting Diode

Implementation Method 2

The voltage limiting section comprises a Zener diode connected to the gate of the MOSFET and configured to clamp the voltage to the gate below the maximum voltage rating of the MOSFET

Methodology Applied
Scientific EffectZener breakdown: Diode

Implementation Method 3

The current limiting section includes a first set of resistors connecting the voltage drop across the load to the gate of the MOSFET through diodes

Methodology Applied
Scientific EffectDiode rectification: Diode

Data Source

PatentUS11683034B2High speed switching solid state relay circuit
Publication Date: 2023.06.20 QM POWER INC
  • US11683034B2 patent drawing
  • US11683034B2 patent drawing
  • US11683034B2 patent drawing

AI summary

A system and method for high speed switching comprises receiving voltage inputs at a bridge rectifier, generating a control signal from a transistor, and driving a gate of a field effect transistor (FET) via the control signal of the transistor, wherein a source of the FET is connected to a negative output of the bridge rectifier and a drain of the FET is connected to a positive output of the bridge rectifier through a load. The system and method further comprises limiting current flowing to the gate of the FET through first and second resistors and first and second diodes connecting the voltage inputs to the gate of the FET and limiting voltage to the gate of the FET below a maximum voltage rating of the FET by a Zener diode connected to the gate of the FET.