Solid State Storage Power-Off Period Estimation
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Solution Overview
Problem
After a solid state storage device is powered off for a period, the threshold voltage distribution curves of triple-level cells shift, leading to error-read bits and reduced access speed due to the need for extensive read retry processes when the device is powered on again, as the previous read voltage sets become unsuitable.
Innovation Solution
A power-off period estimating method that calculates the power-off period by monitoring and recording quality parameters and read voltage sets before and after powering off, allowing for quick recalibration of read voltage sets when the device is powered on, thereby updating the read voltage sets for all blocks and improving access speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the device uses previous read voltage sets after power-off, then the device can maintain simple operation, but the threshold voltage distribution shift causes error-read bits and reduced access speed
Solution Approach 1:
The patent applies preliminary action by performing read voltage set calibration before power-off and storing the calibrated values. After power-off, the device quickly retrieves these pre-calibrated read voltage sets without performing extensive retry processes, thus maintaining high access speed while avoiding the complexity of real-time recalibration.
Solution Approach 2:
The patent uses copying by creating a copy of the optimal read voltage sets during the power-on state, storing them in the interface controller's memory. This copied data allows the device to quickly access pre-optimized voltage values after power-off without needing to perform complex threshold voltage measurements and calibration routines each time.
2Reliability
If the device performs extensive read retry processes to handle threshold voltage shift, then data accuracy can be maintained, but access speed is significantly reduced
Solution Approach 1:
The patent performs threshold voltage measurement and read voltage set calibration in advance during the power-on state, before any data read operations are attempted. This preliminary calibration ensures that the stored read voltage sets are optimized for the current threshold voltage distribution, eliminating the need for extensive retry processes and ensuring both high accuracy and fast access.
Solution Approach 2:
The patent implements feedback by measuring the actual threshold voltage distribution of the memory blocks and using this information to dynamically adjust and calibrate the read voltage sets. This feedback mechanism ensures that the read voltage values are continuously optimized to match the actual device state, maintaining high data read accuracy without requiring multiple retry attempts.
3Speed
If the device quickly updates read voltage sets after power-on, then access speed is improved, but the complexity of monitoring and recalibrating increases
Solution Approach 1:
The patent segments the memory device into distinct functional modules: the interface controller handles calibration and storage of read voltage sets, while the memory array executes read operations using these voltage sets. This segmentation allows the calibration complexity to be isolated to a dedicated controller unit, simplifying the overall system architecture while enabling fast access through pre-calibrated voltage values.
Solution Approach 2:
The device performs self-service by automatically measuring its own threshold voltage distribution and calibrating its read voltage sets without external intervention. The interface controller autonomously monitors the memory blocks, detects threshold voltage shifts, and updates the read voltage sets accordingly, eliminating the need for complex external calibration equipment or manual adjustment procedures.
Data Source
AI summary
A power-off period estimating method for a solid state storage device is provided. A memory array of a non-volatile memory of the solid state storage device includes plural blocks. Firstly, a first quality parameter of a first block of the plural blocks is calculated before the solid state storage device is powered off. When the first block is corrected at a first time counting value, a first read voltage set of the first block is acquired and the first time counting value is recorded. Then, the first block is corrected after the solid state storage device is powered on, so that a second read voltage set of the first block is acquired. Then, a power-off period is calculated according to the first quality parameter, the first read voltage set, the second read voltage set and the first time counting value.