Solid-State Thin-Film Capacitor for Implantable Devices
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Solution Overview
Problem
There is a need for improved techniques to fabricate implantable medical devices with increasing complexity and decreasing size specifications, particularly for forming capacitive elements on semiconductor substrates without compromising the substrate area available for other electrical elements.
Innovation Solution
The development of solid-state thin-film capacitors with a multilayer structure comprising a transition metal electrode, an oxide dielectric layer, and a metal oxide electrode, utilizing cathodic arc deposition and chemical vapor deposition or sputter deposition to produce thick, stress-free, porous, and crenulated metallic structures on semiconductor substrates, enabling the creation of complex three-dimensional configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional capacitor fabrication techniques are used, then the capacitor can be formed on the semiconductor substrate, but the substrate area available for other electrical elements is reduced
Solution Approach 1:
The patent transitions from planar capacitor structures to three-dimensional vertical capacitor structures. The capacitor is formed by depositing alternating layers of conductive material and dielectric material to create a stacked multilayer configuration, utilizing the vertical dimension (z-axis) rather than expanding horizontally. This dimensional change allows the capacitor to occupy minimal substrate area while maintaining adequate capacitance through increased effective electrode area in the vertical stack.
Solution Approach 2:
The capacitor structure is nested within the semiconductor device architecture by integrating the multilayer capacitor stack directly into the substrate or alongside other device components. The alternating conductive-dielectric layers are nested sequentially, with each layer contained within the vertical envelope of the device, maximizing space utilization without encroaching on lateral substrate area needed for other electrical elements.
2Volume of moving object
If device dimensions are reduced to decrease device size, then the profile is reduced, but the complexity of fabrication techniques increases
Solution Approach 1:
The capacitor fabrication process is segmented into distinct deposition stages, with each stage forming a specific layer (conductive layer, dielectric layer, conductive layer, etc.). This segmentation allows for precise control of each layer's properties independently and enables the use of specialized deposition techniques optimized for each material type, thereby managing fabrication complexity through structured process breakdown.
Solution Approach 2:
The patent employs parameter changes in the deposition process, including varying deposition conditions (such as temperature, pressure, gas flow rates) and material composition parameters to optimize each layer's characteristics. By adjusting these parameters during sequential deposition, the process achieves precise control over layer thickness, density, and electrical properties, managing complexity through parameter optimization rather than process complexity.
3Reliability
If thick metallic structures are deposited to create capacitive elements, then the capacitance increases, but the deposited material may exhibit stress that compromises device reliability
Solution Approach 1:
The patent utilizes porous metallic structures deposited by cathodic arc deposition to form the conductive layers. The porous morphology reduces material density and internal stress while maintaining electrical conductivity through the interconnected pore structure. This porous configuration allows thick capacitor structures to achieve high capacitance without accumulating excessive stress that would compromise device reliability.
Solution Approach 2:
The capacitor structure employs composite material architecture with alternating layers of conductive material and dielectric material. This composite structure distributes stress across multiple interfaces and materials with different mechanical properties, preventing stress concentration in any single thick metallic layer. The dielectric layers act as stress barriers, allowing the overall structure to maintain stability while achieving the required capacitance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for the production of advanced semiconductor devices with enhanced functionality while reducing device size, enabling the formation of capacitive structures in high aspect ratio locations and maintaining functionality in physiological environments for extended periods.
Implementation Method 1
One known type of material deposition protocol is cathodic arc deposition. In cathodic arc plasma deposition, a form of ion beam deposition, an electrical arc is generated between a cathode and an anode that causes ions from the cathode to be liberated from the cathode and thereby produce an ion beam. The resultant ion beam, i.e., plasma of cathodic material ions, is then contacted with a surface of a substrate to deposit a structure on the substrate surface that is made up of the cathodic material
Implementation Method 2
Deposition techniques that may be employed in certain aspects of fabrication of the structures include, but are not limited to: electroplating, plasma spray, sputtering, e-beam evaporation, physical vapor deposition, chemical vapor deposition, plasma enhanced chemical vapor deposition, etc.
Implementation Method 3
Deposition techniques that may be employed in certain aspects of fabrication of the structures include, but are not limited to: electroplating, plasma spray, sputtering, e-beam evaporation, physical vapor deposition, chemical vapor deposition, plasma enhanced chemical vapor deposition, etc.
Data Source
AI summary
Solid-state thin-film capacitors are provided. Aspects of the solid-state thin-film capacitors include a first electrode layer of a transition metal, a dielectric layer of an oxide of the transition metal, and a second electrode layer of a metal oxide. Also provided are methods of making the solid-state thin-film capacitors, as well as devices that include the same. The capacitor may have one or more cathodic arc produced structures, i.e., structures produced using a cathodic arc deposition process. The structures may be stress-free metallic structures, porous layers and layers displaying crenulations. Aspects of the invention further include methods of producing capacitive structures using chemical vapor deposition and/or by sputter deposition.