Solidly Mounted Resonator with Planarized Lower Electrode
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Solution Overview
Problem
The lattice structure and orientation of the piezoelectric layer in conventional solidly mounted resonators are deteriorated due to the etching of the lower electrode, affecting device performance.
Innovation Solution
A solidly mounted resonator design with a lower electrode layer featuring protruding portions and a laminated structure, allowing for a planarization surface for the piezoelectric layer growth, reducing etching steps, and incorporating electrode slots to enhance acoustic impedance mismatch and reduce energy leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a lower electrode pattern is etched first and then a piezoelectric layer is deposited, then the piezoelectric layer can be grown on the lower electrode surface, but the uneven surface causes lattice structure deterioration and affects piezoelectric effect
Solution Approach 1:
The patent applies preliminary action by forming a planarization layer before depositing the piezoelectric layer. The lower electrode pattern is first etched into the substrate, then a planarization layer is deposited and planarized to create a flat surface. This preliminary planarization ensures that the subsequent piezoelectric layer grows on a uniform surface, preventing lattice structure deterioration while maintaining fabrication feasibility.
2Productivity
If the piezoelectric layer is grown on an uneven lower electrode surface, then the fabrication process is simplified, but the lattice orientation is deteriorated and piezoelectric performance is affected
Solution Approach 1:
The patent introduces a planarization layer as an intermediary between the uneven lower electrode surface and the piezoelectric layer. This intermediate layer mediates the contradiction by providing a flat growth surface for the piezoelectric layer while allowing the underlying electrode pattern to remain complex. The planarization layer thus preserves both fabrication efficiency and piezoelectric performance.
3Loss of energy
If conventional etching methods are used to form the lower electrode, then metal over-etching occurs and energy loss increases, but the fabrication process remains simple
Solution Approach 1:
The patent converts the potential harm of metal over-etching into a benefit by using the etched lower electrode pattern as a template for forming acoustic mirrors. The same etching process that could cause over-etching and energy loss is instead utilized to create the necessary acoustic mirror structure. By carefully controlling the etching depth and using the etched features to define the acoustic mirror regions, the design eliminates energy loss while maintaining structural functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves piezoelectric performance by maintaining crystal structure integrity, reducing energy loss, and simplifying the manufacturing process while minimizing device size.
Implementation Method 1
a piezoelectric material may be grown on an upper surface of a lower electrode to form a piezoelectric layer
Implementation Method 2
The Bragg reflector is formed by alternating high and low acoustic impedance materials
Implementation Method 3
a method for forming these structures through metal deposition and etching
Data Source
AI summary
Provided are a solidly mounted resonator and a method for preparing a solidly mounted resonator. The solidly mounted resonator includes: a piezoelectric structure, wherein the piezoelectric structure includes: an upper electrode layer, a lower electrode layer and a piezoelectric layer. The lower electrode layer disposed corresponding to the piezoelectric structure, and the lower electrode layer includes: a protruding portion protruding downward corresponding to a lower surface of the lower electrode layer; the piezoelectric layer is disposed on an upper surface of the lower electrode layer; the upper electrode layer is disposed on an upper surface of the piezoelectric layer.


