SONET Signal Termination Circuit for Physical Virtual Concatenation
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Solution Overview
Problem
Existing SONET receivers require significant silicon real estate to handle both physically and virtually concatenated signals due to separate logic blocks for each, which is inefficient.
Innovation Solution
A single integrated circuit substrate with a signal termination circuit capable of processing both physically and virtually concatenated signals by converting physically concatenated signals into virtually concatenated signals for processing by virtual concatenation logic, eliminating the need for separate physical concatenation logic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If separate logic blocks are provided in receivers to handle both physically and virtually concatenated signals, then both signal types can be processed, but the receiver occupies significant silicon real estate
Solution Approach 1:
The patent merges the functionality of separate physical concatenation logic and virtual concatenation logic into a unified logic block. The receiver uses a single logic structure that can handle both physically concatenated signals (where multiple STS-1 signals are combined into a higher-order signal) and virtually concatenated signals (where lower-order signals are virtually combined), eliminating the need for duplicate logic blocks and reducing silicon area
Solution Approach 2:
The patent creates a universal logic block that performs multiple functions - it can process both physically concatenated signals and virtually concatenated signals through the same hardware structure. The logic block adapts its operation based on the signal type received, providing multi-functionality without requiring separate dedicated logic for each signal type
2Adaptability or versatility
If numerous logic gates are included in the receiver to handle both signal types, then processing capability is improved, but circuit complexity increases
Solution Approach 1:
The patent combines what would traditionally require numerous separate logic gates for physical concatenation handling with the virtual concatenation logic into a single integrated logic structure. This merging reduces the total number of logic gates needed while maintaining the ability to process both signal types
3Adaptability or versatility
If conversion circuit is added to convert physically concatenated signals to virtually concatenated signals, then signal compatibility is improved, but device complexity increases
Solution Approach 1:
The conversion circuit is designed with multi-functionality, serving both as a conversion element and as part of the unified processing logic. The same logic block that processes virtual concatenation signals also performs the conversion function when receiving physical concatenation signals, eliminating the need for entirely separate conversion hardware
Data Source
AI summary
A SONET signal is terminated by pointer processing a physically concatenated SONET signal to output a pointer processed physically concatenated SONET signal. Virtual concatenation-related byte markers (for example, H4 and J1) are then inserted into the pointer processed physically concatenated SONET signal. Virtual concatenation overhead data (for example, MFI and SEQ#) is then inserted into the pointer processed physically concatenated SONET signal so as to produce a converted virtually concatenated SONET signal. Virtual concatenation logic processing is then performed on the converted virtually concatenated signal. In this way, a physically concatenated SONET signal can be received and processed on a single integrated circuit with a virtual concatenation logic processor receiver this obviating the need for including a separate physically concatenated logic processing receiver or multiple integrated circuit chips.