SONOS Voltage Multiplier for DC-to-DC Conversion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Dickson multipliers in integrated circuits face inefficiencies due to threshold voltage limitations and parasitic capacitances, leading to reduced ideal output voltage, especially at low voltages, where diode-wired MOSFETs do not perform well, necessitating complex circuits and increased clock frequencies that eventually lead to losses.
Innovation Solution
Incorporating SONOS devices with directionally altered threshold voltages by applying positive or negative voltages to their gate regions, causing electrons or holes to tunnel through the oxide layer and become trapped in silicon nitride, altering the threshold voltage to enhance efficiency and reduce leakage currents.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If diode-wired MOSFETs are used in Dickson multipliers, then voltage multiplication can be achieved, but threshold voltage limitations and parasitic capacitances reduce the ideal output voltage
Solution Approach 1:
The patent applies parameter changes by introducing body biasing to dynamically adjust the threshold voltage of the SONOS transistor. By changing the body voltage parameter, the threshold voltage can be lowered to reduce voltage drops across the switching device, thereby improving the ideal output voltage and reducing energy loss in the multiplier circuit
Solution Approach 2:
The patent uses SONOS (Silicon-Oxide-Nitride-Oxide-Silicon) composite structure as the switching device instead of conventional MOSFETs. This composite material structure provides both the voltage multiplication capability and reduced parasitic effects, addressing the output voltage reduction issue while maintaining the multiplier function
2Productivity
If clock frequency is increased to overcome low voltage performance issues, then voltage multiplication efficiency improves, but losses increase due to stray capacitance and imperfections
Solution Approach 1:
The patent changes the threshold voltage parameter through body biasing to enable efficient operation at lower clock frequencies. By lowering the threshold voltage, the SONOS transistor can switch effectively even at reduced frequencies, thereby maintaining productivity while minimizing losses from stray capacitance and other imperfections that increase with frequency
3Power
If complex circuits are used to overcome diode-wired MOSFET limitations at low voltages, then voltage multiplication can be maintained, but device complexity increases
Solution Approach 1:
The patent uses body biasing to dynamically adjust the threshold voltage of a single SONOS transistor, enabling it to function effectively as a diode-wired device at low voltages. This parameter change approach maintains voltage multiplication capability while avoiding the need for complex circuit configurations, thereby reducing device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the efficiency of DC-to-DC conversion by increasing current drive in one direction while minimizing reverse currents, allowing for higher voltage multiplication with reduced parasitic capacitance and leakage, thus overcoming the limitations of traditional Dickson multipliers.
Implementation Method 1
applying a positive or negative voltage to at least a gate region of said at least one SONOS device thereby forcing electrons or holes from a channel region in said SONOS device to tunnel through an oxide layer
Data Source
AI summary
A method and a system for DC-to-DC conversion are provided herein. The system may include a direct current to direct current (DC-to-DC) converter which may include at least one silicon-oxide-nitride-oxide-silicon (SONOS) device operable to perform voltage multiplication. The method may include directionally altering the threshold voltage of at least one silicon-oxide-nitride-oxide-silicon (SONOS) device, including applying a positive or negative voltage to at least a gate region of said at least one SONOS device thereby forcing electrons or holes from a channel region in said SONOS device to tunnel through an oxide layer (SiO), become trapped in silicon nitride (SiN), and accumulate proximate to a source region and/or a drain region in said at least one SONOS device, said accumulated electrons or holes altering the threshold voltage of said at least one SONOS device in a direction of said source or said drain region.


