SONOS Memory Nitride Layer Protection via Vertical Oxide
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Solution Overview
Problem
Conventional SONOS non-volatile memory structures face challenges in protecting the nitride charge trapping layer during fabrication, leading to potential damage and reduced durability, especially as memory devices become more integrated and complex.
Innovation Solution
A manufacturing method involving the formation of a gate dielectric layer, charge trapping layers, and a gate conductive layer, with a vertical oxide layer formed beside the gate conductive layer to protect the nitride layer, ensuring its integrity and charge trapping function.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory devices are miniaturized to achieve high integration, then device capacity and integration are improved, but fabrication process complexity increases and process control difficulty worsens
Solution Approach 1:
The gate structure is segmented into distinct functional layers: gate dielectric layer, charge trapping layer (nitride), and blocking layer (oxide). This segmentation allows each layer to be optimized independently for its specific function while maintaining overall device performance during miniaturization
Solution Approach 2:
The charge trapping layer is formed and protected with blocking layers before subsequent fabrication steps. This preliminary protection structure is established in advance to prevent damage to the critical nitride layer during complex fabrication processes
2Ease of manufacture
If the nitride charge trapping layer is exposed during fabrication, then manufacturing simplicity is maintained, but the nitride layer becomes susceptible to damage and yield decreases
Solution Approach 1:
Blocking oxide layers are formed beforehand to cushion and protect the nitride charge trapping layer from potential damage during subsequent fabrication steps. This protective structure is prepared in advance to prevent yield loss
Solution Approach 2:
The blocking oxide layer serves as an intermediary protective barrier between the nitride charge trapping layer and the external fabrication environment. This mediator protects the sensitive nitride layer while allowing fabrication processes to continue
3Reliability
If the charge trapping layer is protected with additional layers, then nitride layer durability is improved, but device structure complexity increases
Solution Approach 1:
The blocking oxide layers serve multiple functions: they protect the nitride layer from damage, provide electrical isolation, and contribute to the overall gate structure functionality. This multi-functionality reduces the need for additional separate protective structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances the durability of the SONOS memory structure by protecting the nitride layer from damage, maintaining its charge trapping function and improving electrical performance, as demonstrated by reduced voltage degradation after repeated operations.
Implementation Method 1
an oxidation process is performed, to transfer parts of the multiple layer structure into at least one oxide layer
Data Source
AI summary
The present invention provides a non-volatile memory structure, which includes a substrate, a gate dielectric layer disposed on the substrate, two charge trapping layers, disposed on two sides of the gate dielectric layer respectively and disposed on the substrate, a gate conductive layer disposed on the gate dielectric layer and on the charge trapping layers, wherein a sidewall of the gate conductive layer is aligned with a sidewall of one of the two charge trapping layers, and at least one vertical oxide layer, disposed beside the sidewall of the gate conductive layer.