SONOS Memory Single-Ended Sensing with VCC Tracking
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Solution Overview
Problem
SONOS memory cells face read failures due to significant degradation of sense margin caused by VCC modulation, and existing solutions either require inefficient double-ended sensing schemes or additional dummy columns, which compromise chip area efficiency.
Innovation Solution
A SONOS memory sensing scheme with a reference current circuit that tracks VCC changes, coupled with a current sense amplifier equalizer, generates a datab output to counteract common mode noise, allowing for robust and efficient sensing without additional dummy columns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a double ended sensing scheme is used to track VCC dependence, then sense margin degradation is eliminated, but chip area efficiency deteriorates due to requiring two cells per bit of storage
Solution Approach 1:
The patent creates a virtual reference current by copying and processing the actual bitline current through the equalizer circuit. Instead of using physical dummy columns or dual-cell structures, the invention generates a reference signal that mirrors the VCC-modulated characteristics of the actual cell current, thereby achieving common-mode rejection without additional hardware overhead.
Solution Approach 2:
The equalizer circuit acts as an intermediary between the bitline and the sense amplifier. It processes the bitline current to generate an equalized signal that compensates for VCC modulation effects, serving as a mediator that enables single-ended sensing to achieve differential-like performance without requiring dual-bitline architecture.
2Reliability
If dummy column cells are used to generate reference current, then VCC modulation effects are compensated, but chip area efficiency deteriorates
Solution Approach 1:
Instead of using physical dummy column cells to generate reference current, the patent copies the functional characteristics of reference current generation by processing the actual bitline current through the equalizer. This virtual copying approach achieves the same VCC compensation effect without requiring additional dummy cell structures.
Solution Approach 2:
The invention extracts the essential function of dummy columns (VCC modulation tracking) from the physical cell structure and implements it through signal processing in the equalizer circuit. This separates the reference generation function from the storage function, eliminating the need for redundant dummy cells while maintaining compensation capability.
3Area of stationary object
If single ended sensing is used without dummy columns, then chip area efficiency is improved, but sense margin degradation occurs due to VCC modulation
Solution Approach 1:
The equalizer circuit serves as an intermediary that processes the single-ended bitline current to generate a reference signal with matching VCC modulation characteristics. This intermediary processing enables the sense amplifier to reject common-mode noise without requiring dual-ended sensing architecture.
Solution Approach 2:
The equalizer creates a virtual copy of the VCC-modulated current characteristics from the actual bitline signal. By copying these characteristics into the reference path, the system achieves common-mode rejection in a single-ended configuration, maintaining area efficiency while improving sense margin.
Data Source
AI summary
An apparatus and method for sensing memories is provided. In one embodiment, the apparatus includes a current sense amplifier, a column multiplexer coupled to a first input of the current sense amplifier and to a memory array, and a current reference circuit and a replica pass transistor coupled to a second input of the current sense amplifier. Other embodiments are also provided.