SOPC Power-Up Configuration Without External Flash Memory

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Solution Overview

Problem

The increasing size and capability of Field Programmable Gate Arrays (FPGAs) lead to a significant increase in the amount of expensive and space-consuming configuration memory required for programming, which is costly and occupies valuable board space.

Innovation Solution

The system configures a System on a Programmable Chip (SOPC) using one or more voltage sources to provide configuration data instead of relying on external non-volatile memory, reducing the need for flash memory and other non-volatile storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If FPGAs grow in size and capability, then the functionality and performance of the SOPC are improved, but the amount of configuration memory required increases, leading to higher cost and greater board space consumption

Engineering Contradiction:
ImproveFPGA capabilityVSAvoidboard space
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent extracts the configuration data storage function from external non-volatile memory and relocates it to volatile memory blocks within the FPGA. This is achieved by using internal memory resources that are already part of the FPGA fabric, thereby eliminating the need for separate external configuration memory components and reducing overall board space.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the configuration data storage function with the volatile memory blocks that are already integrated into the FPGA architecture. By combining configuration storage with existing memory resources, the system eliminates redundant components and reduces board space while maintaining the ability to configure large-capability FPGAs.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If FPGAs grow in size and capability, then the functionality and performance of the SOPC are improved, but the amount of configuration memory required increases, leading to higher cost

Engineering Contradiction:
ImproveFPGA capabilityVSAvoidconfiguration memory
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent makes the volatile memory blocks serve dual purposes: they function as both operational memory for data processing and as configuration data storage during the configuration phase. This multi-functionality eliminates the need for dedicated external configuration memory, reducing the total quantity of memory required while supporting larger FPGA capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The FPGA uses its own internal volatile memory blocks to store and load configuration data, eliminating the need for separate external configuration memory components. The system serves its own configuration needs using resources already integrated into its architecture, thereby reducing the quantity of additional memory required.

Inventive Principle:
Principle #25Self-service

3Reliability

If external non-volatile memory is used for configuration, then configuration data can be stored reliably, but additional board space and power supply requirements are incurred

Engineering Contradiction:
Improveconfiguration data storageVSAvoidpower supply
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent extracts the configuration data storage function from external non-volatile memory and implements it using volatile memory blocks within the FPGA. This eliminates the need for separate external memory components and their associated power supplies, reducing power consumption while maintaining configuration capabilities.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the configuration storage function with the FPGA's internal volatile memory blocks, which are already powered by the FPGA's core power supply. This consolidation eliminates redundant power supply requirements and reduces overall power consumption while maintaining reliable configuration data storage.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP2523349B1Systems and methods for configuring an SOPC without a need to use an external memory
Publication Date: 2019.07.17 ALTERA CORP
  • EP2523349B1 patent drawingFigure 1
  • EP2523349B1 patent drawingFigure 2
  • EP2523349B1 patent drawingFigure 3

AI summary

Systems and techniques for configuration of a system on a programmable chip (SOPC) are described. By configuring the SOPC, during power-up, with a voltage input instead of with a flash memory or another non-volatile memory, the systems and techniques may save cost and board space.