Frame-to-Frame Coherency for Sort-Last Graphics Rendering

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Solution Overview

Problem

Conventional sort-first graphics architectures start from scratch when rendering subsequent frames, despite significant frame-to-frame coherency, leading to inefficient processing and power consumption, especially in mobile devices.

Innovation Solution

Implementing a frame-to-frame coherency algorithm for sort-last architectures that marks tiles of pixels covered completely by static draw calls, allowing for the reuse of pixel color values if the same static draw call is redrawn, thereby skipping redundant pixel shader processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional sort-first architecture starts from scratch for each frame, then rendering accuracy is maintained, but processing time and power consumption increase

Engineering Contradiction:
Improverendering accuracyVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-calculating and storing tile coverage information from static draw calls in the previous frame. The coverage ID is computed in advance and stored in a tile cache, allowing the current frame to directly reuse this information without recalculating, thus reducing processing time while maintaining rendering accuracy through the coverage mask validation mechanism.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies local quality by differentiating the processing approach for different regions of the screen. Tiles covered by static draw calls are identified and marked with coverage IDs, allowing selective reuse of pixel data only in those specific local regions where coherency exists, while other regions are processed normally. This localized optimization reduces overall processing time without compromising global rendering accuracy.

Inventive Principle:
Principle #3Local quality

2Reliability

If conventional sort-first architecture processes all pixels every frame, then rendering completeness is ensured, but power consumption increases

Engineering Contradiction:
Improverendering completenessVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by pre-computing coverage masks and storing coverage IDs for static draw calls before the current frame rendering. This advance preparation allows the renderer to identify and skip tiles that haven't changed, avoiding redundant pixel shader executions and significantly reducing power consumption while ensuring rendering completeness through the coverage validation mechanism.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies discarding and recovering by identifying tiles whose pixel data can be discarded (skipped from reprocessing) based on coverage ID matching, while recovering the optimization benefit through selective reuse. The coverage mask system ensures that only tiles appropriate for reuse are discarded from processing, maintaining rendering completeness while reducing power consumption by avoiding unnecessary computations.

Inventive Principle:
Principle #34Discarding and recovering

3Productivity

If frame-to-frame coherency is exploited, then processing efficiency improves, but system complexity increases

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the screen into discrete tiles and assigning a coverage ID to each tile based on static draw call coverage. This segmentation allows independent processing and optimization of individual tiles, improving processing efficiency through parallelization and selective reuse, while managing system complexity by breaking down the overall rendering task into manageable tile-level operations with simple ID comparison logic.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies the intermediary principle by introducing coverage masks and coverage IDs as intermediate data structures that mediate between the static draw call information and the pixel rendering process. These intermediaries enable efficient frame-to-frame coherency exploitation by providing a simple comparison mechanism (ID matching) that bridges previous frame data and current frame requirements, improving processing efficiency while keeping the system complexity manageable through the use of straightforward intermediate representations.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Use of energy by moving object

If pixel shader processing is skipped for coherent tiles, then power consumption reduces, but implementation complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidimplementation complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-computing coverage masks and storing coverage IDs for static draw calls before rendering begins. This advance computation creates a lookup table that enables simple ID comparison during tile processing, allowing pixel shader skipping decisions to be made through straightforward equality checks rather than complex analysis, thus reducing power consumption while keeping implementation complexity low.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies self-service by enabling the rendering system to automatically identify and skip coherent tiles through the coverage ID matching mechanism without requiring complex external control or analysis. The coverage mask system serves itself by providing the necessary information (coverage IDs) that allows the renderer to autonomously make optimization decisions, reducing power consumption through selective processing while maintaining simple implementation through self-contained tile-level logic.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP3221850B1Apparatus and method for efficient frame-to-frame coherency exploitation for sort-last architectures
Publication Date: 2019.12.18 INTEL CORP
  • EP3221850B1 patent drawingFigure 1
  • EP3221850B1 patent drawingFigure 2
  • EP3221850B1 patent drawingFigure 3

AI summary

An apparatus and method are described for the frame-to-frame coherency algorithm for sort-last architecture. In one embodiment of the invention, if a tile of pixels is covered completely by one triangle from a static draw call in one frame, then that tile is marked with that draw call's identifier. For the next frame, if the same static draw call is drawn, the same tile will be visited, and if the draw call's fragment passes for all pixels, it indicates that tile will contain exactly the same pixel color values as the previous frame. Hence, there is no requirement to run the pixel shader for the tile of pixels, and the color values of the tile can instead be reused from the previous frame.