SOT Magnetic Tunnel Junction Circuit for Endurance and Retention

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Solution Overview

Problem

Semiconductor circuits face challenges in achieving high reliability for data storage due to limitations in endurance and retention, particularly when using spin transfer torque magnetic tunnel junction elements, which can lead to deterioration over time.

Innovation Solution

The semiconductor circuit employs SOT magnetic tunnel junction elements, where the resistance state is set by current flow between terminals through a metal layer, reducing the risk of deterioration and allowing for lower voltage and current usage, thereby enhancing endurance and retention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If spin transfer torque magnetic tunnel junction elements are used for data storage, then data storage capability is achieved, but endurance and retention deteriorate over time

Engineering Contradiction:
Improveendurance and retentionVSAvoiddata storage duration
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent segments the current path by introducing a separate metal layer (non-magnetic layer) adjacent to the tunnel barrier layer. This metal layer carries the current that would otherwise flow through the tunnel barrier, thereby segmenting the harmful current path from the storage element and protecting it from degradation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a metal layer as an intermediary element between the electrode and the magnetic tunnel junction. This intermediary layer absorbs the current flow that would normally stress the tunnel barrier, serving as a mediator that protects the storage element while still enabling data storage functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Speed

If higher voltage and current are used to set resistance state, then faster switching is achieved, but deterioration of storage element occurs

Engineering Contradiction:
Improveswitching speedVSAvoidendurance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The current path is segmented into two separate paths: one through the metal layer and another through the tunnel barrier layer. This segmentation allows the switching current to flow through the metal layer without degrading the tunnel barrier, enabling faster switching without compromising reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The metal layer acts as an intermediary current carrier that enables fast switching operations. By directing the switching current through this intermediary layer rather than directly through the tunnel barrier, the patent achieves fast switching speeds while protecting the storage element from damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration increases the reliability of data storage by reducing current flow through the tunnel barrier layer, minimizing the risk of deterioration, and allowing for smaller transistor sizes, leading to improved endurance and retention while maintaining efficient data storage.

Implementation Method 1

The first storage element is configured to set a resistance state between the first terminal and the second and the third terminals to a first resistance state or a second resistance state in accordance with a direction of a current flowing between the second terminal and the third terminal

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentUS11900993B2Semiconductor circuit and semiconductor circuit system
Publication Date: 2024.02.13 SONY SEMICON SOLUTIONS CORP
  • US11900993B2 patent drawing
  • US11900993B2 patent drawing
  • US11900993B2 patent drawing

AI summary

A semiconductor circuit according to the present disclosure includes: a first circuit configured to apply an inverted voltage of a voltage at a first node to a second node; a second circuit configured to apply an inverted voltage of a voltage at a second node to the first node; a first storage element including first, second, and third terminals; a first transistor including a drain coupled to the first node and a source coupled to the first terminal of the first storage element; a second transistor including a gate coupled to the first node or the second node and a drain coupled to the second terminal of the first storage element; and a third transistor including a gate coupled to the first node or the second node and a drain coupled to the second terminal of the first storage element. The first storage element is configured to set a resistance state between the first terminal and the second and third terminals in accordance with a direction of a current flowing between the second and third terminals.