SOT Magnetic Memory Cell Reducing Area via Diode Reference Layer

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Solution Overview

Problem

SOT-MRAMs have an increased cell area due to the need for three terminals, which limits the smallest cell size to approximately 12 F^2, making them less efficient in terms of memory storage density.

Innovation Solution

A magnetic memory design that includes a nonmagnetic layer with two terminals, a magnetoresistive element with a storage and reference layer, and a diode, where the diode is connected to the reference layer, reducing the cell size to 6 F^2 by optimizing the connections and voltage applications for write and read operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If SOT-MRAM structure with three terminals is used to switch magnetization via spin Hall effect, then write operation is achieved, but cell area increases to approximately 12 F^2

Engineering Contradiction:
Improvewrite operation capabilityVSAvoidcell area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent combines the reference layer with the diode structure, merging two separate components into a unified element. The diode cathode is directly connected to the reference layer, eliminating the need for a separate terminal and reducing the number of required terminals from three to two, thereby decreasing cell area while maintaining write operation capability

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The diode serves multiple functions: it provides rectification for read operations and simultaneously connects to the reference layer for write operations. This multi-functionality eliminates the need for a dedicated reference layer terminal, reducing the terminal count and cell area while preserving both read and write capabilities

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If current is applied between storage layer and reference layer via tunnel barrier for write operation, then magnetization switching is achieved, but tunnel barrier breaks and read disturb occurs

Engineering Contradiction:
Improvemagnetization switchingVSAvoidtunnel barrier breakdown and read disturb
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a nonmagnetic layer as an intermediary between the bit line and the storage layer. This nonmagnetic layer generates spin-orbit torque through the spin Hall effect when current passes through it, indirectly switching the storage layer magnetization without requiring current to flow through the tunnel barrier, thereby preventing tunnel barrier breakdown and read disturb

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the direct current-through-tunnel-barrier mechanism with a spin Hall effect-based mechanism. Instead of applying current directly across the magnetoresistive element, the system uses a nonmagnetic layer to generate spin current that acts on the storage layer, substituting a mechanical/electrical direct interaction with a quantum mechanical spin-based interaction that avoids tunnel barrier stress

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves a reduced cell size while maintaining efficient write and read operations, improving memory storage density and addressing the issue of increased cell area in SOT-MRAMs.

Implementation Method 1

the magnetization of the storage layer is switched by a spin Hall effect or spin orbit torque (SOT)

Methodology Applied
Scientific EffectSpin-orbit torque: Hall Effect

Implementation Method 2

An MRAM includes a magnetic tunnel junction (MTJ) element as a storage element

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentUS9830968B2Spin orbit torque (SOT) magnetic memory cell and array
Publication Date: 2017.11.28 KK TOSHIBA
  • US9830968B2 patent drawing
  • US9830968B2 patent drawing
  • US9830968B2 patent drawing

AI summary

A magnetic memory according to an embodiment includes: at least one memory cell, the memory cell comprising: a conductive layer including a first terminal, a second terminal, and a portion located between the first terminal and the second terminal; a magnetoresistive element including: a first magnetic layer; a second magnetic layer between the portion and the first magnetic layer; and a nonmagnetic layer between the first magnetic layer and the second magnetic layer; a diode including an anode and a cathode, one of the anode and the cathode being electrically connected to the first magnetic layer; and a transistor including third and fourth terminals and a control terminal, the third terminal being electrically connected to the first terminal.