Semiconductor Memory Circuit Using SOT Cells for Power-Cycle Data Retention
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor circuits face challenges in enhancing the endurance and reliability of memory elements, particularly in maintaining data integrity during power cycles, as existing technologies may lead to data loss or memory element deterioration due to current flow through magnetoresistive elements.
Innovation Solution
The semiconductor circuit employs SOT type memory elements that set resistance states by current flow through adjacent wiring lines, avoiding direct current passage through magnetoresistive elements, and utilizes a controller to manage power supply and transistor operations for efficient data storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If current is applied through magnetoresistive elements to set resistance states, then memory elements can store information, but endurance deteriorates due to direct current passage causing element deterioration
Solution Approach 1:
The patent introduces an intermediary structure (adjacent wiring lines) between the current source and the magnetoresistive element. The current flows through these wiring lines adjacent to the magnetoresistive element rather than directly through it, enabling magnetic field generation for resistance state switching while preventing direct current-induced deterioration of the magnetoresistive element, thus improving endurance.
2Use of energy by moving object
If power supply is stopped to reduce power consumption, then energy savings are achieved, but data loss occurs in volatile memory elements
Solution Approach 1:
The patent employs a preliminary action by stopping power supply to the magnetoresistive element before data loss can occur. Since magnetoresistive elements retain their resistance states without power (non-volatile), the data is preserved even when power is cut to reduce consumption, preventing data loss while achieving energy savings.
3Productivity
If power supply is restarted after being stopped, then operation can resume, but returning to operational state takes time without nonvolatile memory
Solution Approach 1:
The magnetoresistive element performs self-service by automatically retaining its resistance state (data) without requiring active maintenance or power. When power is restored after being stopped, the element is already in its previous state, enabling immediate resumption of operations without time-consuming data recovery or reinitialization processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances endurance by preventing data loss and reducing memory element deterioration, allowing for reliable data storage and quick restoration of memory states after power cycles.
Implementation Method 1
The first memory element has a first terminal, a second terminal, and a third terminal, and is configured to be able to store information by setting a resistance state between the second terminal and the third terminal to a first resistance state or a second resistance state in accordance with a direction of a first current flowing between the first terminal and the second terminal
Data Source
AI summary
A semiconductor circuit according to the present disclosure includes a first circuit that generates an inverted voltage of a voltage at a first node, and applies the inverted voltage to a second nodes, a second circuit that generates an inverted voltage of a voltage at the second node, and applies the inverted voltage to the first node, a first memory element that has a first terminal, a second terminal, and a third terminal, and stores information by setting a resistance state between the second terminal and the third terminal to a first resistance state or a second resistance state in accordance with a direction of a first current flowing between the first terminal and the second terminal, a first transistor that couples the first node to the third terminal of the first memory element and a second transistor that is coupled to a first coupling node.