SOT-MRAM Cell Using Anomalous Hall Effect for Deterministic Switching

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Solution Overview

Problem

Scaling MRAM devices to high densities is hindered by large currents required for switching and disturbances to neighboring cells during writing, which can lead to erroneous data storage in Spin Orbit Torque (SOT) Magnetoresistive Random Access Memory (MRAM) devices.

Innovation Solution

The introduction of a SOT-MRAM memory cell design featuring a free layer, a non-magnetic spin orbit torque layer, an exchange-pinned ferromagnetic bias layer, and an antiferromagnetic layer, where the spin Hall effect or anomalous Hall effect is utilized to provide deterministic switching by generating a spin orbit torque and static in-plane magnetic bias field, eliminating the need for external permanent magnets and simplifying chip design.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional MRAM devices use current leads to generate magnetic field for switching, then the free layer magnetization can be set, but the currents required become prohibitively large and disturbances to neighboring cells occur

Engineering Contradiction:
Improvedata storage accuracyVSAvoidcurrent magnitude
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces the conventional current lead magnetic field generation mechanism with a spin transfer torque mechanism. Instead of using large currents through external leads to generate magnetic fields, the invention uses spin-polarized current passing through the reference magnetic layer to exert spin transfer torque on the free layer, enabling magnetization switching at much lower current levels and eliminating disturbances to neighboring cells.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Use of energy by moving object

If spin transfer torque is used to switch the free layer, then current requirements are reduced, but the write current path passes through the magnetic layers which may affect endurance

Engineering Contradiction:
Improvecurrent magnitudeVSAvoiddevice endurance
Core Design Contradiction:
Use of energy by moving objectVSDuration of action of stationary object

Solution Approach 1:

The patent segments the current path into separate read and write paths. The write current passes through the reference layer and nonmagnetic spacer to reach the free layer, while the read current flows through different terminals. This segmentation allows the write operation to use spin transfer torque through controlled current paths, reducing overall current requirements while protecting the reference layer from excessive current stress that would degrade endurance.

Inventive Principle:
Principle #1Segmentation

3Quantity of substance

If high density scaling is implemented, then memory capacity increases, but the large currents required for switching become more problematic and cell disturbances increase

Engineering Contradiction:
Improvememory densityVSAvoidcell disturbance
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent employs local quality by creating highly localized magnetic fields through the spin transfer torque mechanism. The spin-polarized current generates magnetic effects only in the immediate vicinity of the free layer, with the magnetic field confinement achieved through the layered structure including the reference layer, spacer, and free layer. This localized action allows high-density cell packing without causing disturbances to neighboring cells, enabling scalable memory density increases.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enables deterministic switching of the free layer with reduced current requirements and minimizes disturbances between cells, enhancing memory density and endurance in SOT-MRAM devices.

Implementation Method 1

The SOT layer is chosen to exhibit a substantial spin-Hall effect (SHE). It is positioned below the free layer, and is configured to provide spin orbit torque on the free layer via SHE when electrical (write) current is passed through it.

Methodology Applied
Scientific EffectSpin Hall Effect: Hall Effect

Implementation Method 2

The ferromagnetic bias layer is positioned below the SOT (or SHE) layer and is configured to provide a static in-plane magnetic bias field to the free magnetic layer to achieve deterministic switching of the free layer from a first magnetization state to a second magnetization state.

Methodology Applied
Scientific EffectMagnetic Bias Field: Magnetic Field

Implementation Method 3

The AFM layer is positioned below the ferromagnetic bias layer. The AFM layer is configured to exchange pin a preferred magnetization direction of the ferromagnetic bias layer.

Methodology Applied
Scientific EffectExchange Bias: Magnetism

Implementation Method 4

the ferromagnetic bias layer is chosen to produce a substantial anomalous Hall effect (AHE) to provide spin orbit torque on the free layer, in addition to also providing a static in-plane magnetic bias field

Methodology Applied
Scientific EffectAnomalous Hall Effect: Hall Effect

Implementation Method 5

The spacer magnetically decouples the free layer from the bias layer, and allows passage of a spin current from the magnetic bias/AHE layer to the free layer when an electrical (write) current flows in the bias/AHE layer.

Methodology Applied
Scientific EffectSpin Current Transmission: Conduction (electrical)

Data Source

PatentUS10290337B2Three terminal SOT memory cell with anomalous hall effect
Publication Date: 2019.05.14 WESTERN DIGITAL TECHNOLOGIES INC
  • US10290337B2 patent drawing
  • US10290337B2 patent drawing
  • US10290337B2 patent drawing

AI summary

A method and apparatus for deterministically switching a free layer in a spin orbit torque magnetoresistive random access memory (SOT-MRAM) cell is disclosed herein. In one embodiment, an SOT-MRAM memory cell is provided. The SOT-MRAM memory cell includes a magnetic tunnel junction, a ferromagnetic bias layer, and an antiferromagnetic layer. The magnetic tunnel junction includes a free layer having primarily two bi-stable magnetization directions, a reference layer having a fixed magnetization direction, and an insulating tunnel barrier layer positioned between the free layer and the reference layer. The ferromagnetic bias layer is configured to provide spin orbit torque via anomalous Hall effect and simultaneously configured to provide a magnetic bias field on the free layer to achieve deterministic switching. The antiferromagnetic layer is positioned below the ferromagnetic bias layer and is configured to pin a magnetization direction of the ferromagnetic bias layer in a predetermined direction.