SOT-MRAM Cell With Integrated Diode and SHE Layer
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Solution Overview
Problem
Spin-transfer torque MRAM devices face longevity issues due to high write energies passing through the magnetic tunnel junction, leading to material degradation, and require two transistors for control, increasing die area and reducing cell density.
Innovation Solution
A spin-orbit torque MRAM cell structure with a diode integrated into the stack, allowing control of both read and write operations through a single transistor, and utilizing a spin-Hall-effect layer in contact with a transistor, which reduces write energy passing through the MRAM cell stack.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If two transistors are used to control read and write operations, then operational control is achieved, but die area increases and cell density decreases
Solution Approach 1:
The patent merges the control of read and write operations into a single transistor by utilizing the diode's directional current flow properties. The diode structure allows the same transistor to control current flow for both reading and writing functions, eliminating the need for separate control transistors and reducing die area.
Solution Approach 2:
The diode structure acts as an intermediary element that enables a single transistor to control both read and write operations. The diode's asymmetric current-voltage characteristics allow the transistor to selectively control current flow in different directions, serving as a mediator between the transistor and the MTJ for both operational modes.
2Ease of operation
If write current passes through the magnetic tunnel junction, then writing operation is achieved, but material degradation occurs and device longevity decreases
Solution Approach 1:
The patent extracts the write current path from the magnetic tunnel junction by introducing a separate SHE layer. The write current flows through the SHE layer rather than through the MTJ, eliminating the harmful effect of write current on the tunnel barrier while maintaining the ability to perform write operations via spin-orbit torque.
Solution Approach 2:
The SHE layer serves as an intermediary for write operations, allowing current to be passed without degrading the MTJ. The diode structure further mediates this by directing write current through the SHE layer while allowing read current to pass through the MTJ, thus protecting the tunnel barrier from write-induced degradation.
3Power
If high voltage write energies are passed through the MTJ, then writing is achieved, but energy consumption increases and writing errors occur
Solution Approach 1:
The patent extracts the high-voltage write current path from the MTJ by routing it through the SHE layer instead. This separation allows write operations to be performed with lower voltages that do not damage the tunnel barrier, reducing energy consumption and writing errors while maintaining effective writing capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances cell density by eliminating the need for two transistors, reduces energy usage, and increases the longevity of the device by minimizing write energy exposure to the magnetic tunnel junction.
Implementation Method 1
Spin-orbit-torque (SOT) MRAM cells include a spin-orbit torque, or spin-Hall-effect (SHE), layer in contact with the magnetic tunnel junction (MTJ) structure of the MRAM
Implementation Method 2
MRAM is a type of solid state, non-volatile memory that uses tunneling magnetoresistance (TMR) to store information
Implementation Method 3
a diode structure, forming a write line disposed in electrical contact with the SHE rail
Data Source
AI summary
A spin-orbit torque magnetoresistive random-access memory device formed by fabricating a spin-Hall-effect (SHE) layer above and in electrical contact with a transistor, forming a spin-orbit-torque (SOT) magnetoresistive random access memory (MRAM) cell stack disposed above and in electrical contact with the SHE rail, wherein the SOT-MRAM cell stack comprises a free layer, a tunnel junction layer, a reference layer, and a diode structure, forming a write line disposed in electrical contact with the SHE rail, forming a protective dielectric layer covering a portion of the SOT-MRAM cell stack, and forming a read line disposed above and adjacent to the diode structure.