Shared SOT-MRAM Array With STT-Assisted Fast Switching

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Solution Overview

Problem

The switching energy of Spin Orbit Torque Magnetic Random Access Memory (SOT-MRAM) is limited, hindering further performance improvements in terms of speed and endurance compared to other types of MRAM.

Innovation Solution

A spin transfer torque-assisted SOT-MRAM device is developed, where unit cells are programmed by applying an in-plane charge current to the spin-orbit torque line and a spin transfer current to each magnetic tunnel junction, utilizing both spin-orbit torque and spin transfer torque to quickly switch the magnetization orientation and electrical resistance of the junctions, thereby reducing write latency and increasing switching speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If only spin-orbit torque is used in SOT-MRAM, then the device structure is simple, but the switching energy is high and switching speed is limited

Engineering Contradiction:

Improvedevice structureVSAvoidswitching energy

Core Design Contradiction:

Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent combines spin-orbit torque (SOT) and spin transfer torque (STT) mechanisms into a hybrid SOT-MRAM device. The SOT line generates spin current that assists STT switching through the MTJ, achieving lower switching energy than conventional SOT-MRAM while maintaining a relatively simple device structure with shared SOT lines for multiple MTJs.

Inventive Principle:

Principle #5Merging (Combining)

2Device complexity

If only spin-orbit torque is used in SOT-MRAM, then the device structure is simple, but the switching speed is limited

Engineering Contradiction:

Improvedevice structureVSAvoidswitching speed

Core Design Contradiction:

Device complexityVSSpeed

Solution Approach 1:

The hybrid SOT-MRAM device merges SOT and STT mechanisms to achieve high switching speed. The SOT line provides spin current that reduces the switching barrier, enabling faster magnetization switching compared to conventional SOT-MRAM, while the device structure remains simple with shared SOT lines serving multiple MTJs.

Inventive Principle:

Principle #5Merging (Combining)

3Quantity of substance

If shared SOT lines are used for multiple MTJs, then the device density is improved, but the current management complexity increases

Engineering Contradiction:

Improvedevice densityVSAvoidcurrent management

Core Design Contradiction:

Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent implements shared SOT lines that serve multiple MTJs within a string, making the SOT line universal for programming multiple storage elements. This multi-functionality approach increases device density while the current management is handled through selective activation of specific MTJ strings, balancing complexity and density.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a high-speed, low-latency memory device with improved switching efficiency and density, as the simultaneous application of currents through shared SOT lines allows for faster programming and reading of bit data across multiple MTJs in a string.

Implementation Method 1

applying an in-plane charge current to the spin-orbit torque line

Methodology Applied

Scientific EffectSpin Hall Effect: Hall Effect

Implementation Method 2

switch the magnetization orientation and electrical resistance of the junctions

Methodology Applied

Scientific EffectTunneling Magnetoresistance: Magnetoresistance

Data Source

PatentUS20230282264A1Memory Arrays, Methods of Forming the Same, and Methods of Operating the Same

Publication Date: 2023.09.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

In an embodiment, a device includes: a spin-orbit torque line; a write transistor coupling a first end of the spin-orbit torque line to a first source line; a source transistor coupling a second end of the spin-orbit torque line to a second source line; and a plurality of magnetic tunnel junctions coupled to the spin-orbit torque line, the magnetic tunnel junctions being in a current path between the write transistor and the source transistor.