SOT-MRAM Grid Architecture for Individual Device Addressing

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Solution Overview

Problem

Current magnetic memory systems face challenges in achieving efficient and accurate methods for fabricating and operating memory devices, particularly in terms of switching magnetic orientations in spin-orbit torque (SOT) magnetic random access memory (MRAM) devices, where existing technologies struggle to individually address and switch SOT-MRAM devices without affecting others.

Innovation Solution

The implementation of a magnetic storage device with a grid structure featuring SOT-MRAM devices, where a first write current provides a magnetic torque below the switching threshold to multiple devices, and a second write current, applied along the axis of individual devices, exceeds the threshold for switching, allowing for individual addressability and data encoding in the relative magnetic orientation of storage and reference layers with perpendicular anisotropy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a write current is applied to switch magnetic orientation in SOT-MRAM devices, then data storage is achieved, but individual addressability and selective switching become difficult

Engineering Contradiction:
Improveindividual addressabilityVSAvoidswitching control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the switching control into two independent current paths: a first write current path for applying magnetic torque to multiple devices, and a second write current path for selecting and switching individual devices. This segmentation enables precise individual addressability while maintaining simple control architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a magnetic field as an intermediary mechanism that bridges the first and second write currents. The first write current generates a magnetic field that provides torque to multiple SOT-MRAM devices, while the second write current selectively activates individual devices through their respective write lines, enabling coordinated selective switching.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If high bit density is achieved through grid structure, then storage capacity increases, but manufacturing precision requirements increase

Engineering Contradiction:
Improvebit densityVSAvoiddevice fabrication precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent employs universal write lines and read lines that serve multiple functions across the grid structure. The first write lines extend along the first direction to address multiple devices, while second write lines extend along the second direction for individual selection. This multi-functional line architecture enables high bit density without proportionally increasing manufacturing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent transitions from one-dimensional linear arrays to two-dimensional grid structures by introducing write lines in both first and second directions. This dimensional expansion enables scalable bit density increase while maintaining manageable manufacturing precision requirements through systematic routing patterns.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Speed

If switching speed is maintained in SOT devices, then fast data access is achieved, but energy consumption increases

Engineering Contradiction:
Improveswitching speedVSAvoidwrite current energy
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies partial action by using the first write current to provide magnetic torque that approaches but does not exceed the switching threshold for all devices simultaneously. The second write current then provides the additional selective torque needed for individual device switching. This partial action approach reduces overall energy consumption while maintaining fast switching speeds.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent changes the magnetic field parameters by introducing a first magnetic field generated by the first write current that modulates the switching threshold of multiple devices. This parameter change enables subsequent individual device switching with reduced current requirements, balancing speed and energy efficiency.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient and accurate switching of individual SOT-MRAM devices while maintaining the switching speed of SOT devices, allowing for high bit densities and fast data access with reduced switching times, effectively addressing the limitations of existing memory systems.

Implementation Method 1

spin-orbit torque (SOT) magnetic memory

Methodology Applied
Scientific EffectSpin-orbit torque:

Implementation Method 2

the second write current applied along the axis of the individual SOT-MRAM device provides a second magnetic torque to the individual SOT-MRAM device

Methodology Applied
Scientific EffectMagnetic torque: Torque

Data Source

PatentUS10658021B1Scalable spin-orbit torque (SOT) magnetic memory
Publication Date: 2020.05.19 INTEGRATED SILICON SOLUTION CAYMAN INC
  • US10658021B1 patent drawing
  • US10658021B1 patent drawing
  • US10658021B1 patent drawing

AI summary

A magnetic storage device includes a plurality of first wires extending along a first direction and a plurality of second wires extending along a second direction different from the first direction. The plurality of second wires form a grid with the plurality of first wires. The magnetic storage device further includes a plurality of spin orbit torque magnetic random access memory (SOT-MRAM) devices. Each of the plurality of SOT-MRAM devices is disposed at a respective position on the grid. The magnetic storage device further includes write circuitry, including a transistor coupled to each respective first wire of the plurality of first wires, to apply a first write current along the respective first wire in the first direction, and readout circuitry to read a data value stored by a respective SOT-MRAM device.